Upgrade formatting to clang-format-17

xtensor-stack · Dec 12, 2023 · 9b347ee · 9b347ee
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commit 9b347ee
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Showing 8 changed files with 30 additions and 30 deletions.
diff --git a/.github/workflows/style-check.yml b/.github/workflows/style-check.yml
@@ -12,7 +12,7 @@ jobs:
     - name: Run clang-format style check for C/C++ programs.
       uses: jidicula/clang-format-action@v4.11.0
       with:
-        clang-format-version: '16'
+        clang-format-version: '17'
         exclude-regex: 'doctest.h'
   inlining-check:
     runs-on: ubuntu-latest

diff --git a/include/xsimd/arch/xsimd_rvv.hpp b/include/xsimd/arch/xsimd_rvv.hpp
@@ -550,7 +550,7 @@ namespace xsimd
                 const auto imag_index = vindex<A, as_unsigned_integer_t<T>, 1, 1>();
                 const auto index = rvvabut<as_unsigned_integer_t<T>, A::width>(real_index, imag_index);
                 const auto input = rvvabut<T, A::width>(lo.data, hi.data);
-                const rvv_reg_t<T, A::width* 2> result = __riscv_vrgather(input, index, index.vl);
+                const rvv_reg_t<T, A::width * 2> result = __riscv_vrgather(input, index, index.vl);
 
                 return { rvvget_lo<T, A::width>(result), rvvget_hi<T, A::width>(result) };
             }

diff --git a/include/xsimd/arch/xsimd_wasm.hpp b/include/xsimd/arch/xsimd_wasm.hpp
@@ -1159,31 +1159,31 @@ namespace xsimd
         inline batch<T, A> slide_left(batch<T, A> const& x, requires_arch<wasm>) noexcept
         {
             return wasm_i8x16_shuffle(
-                wasm_i64x2_const(0, 0), x, ((N)&0xF0) ? 0 : 16 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 17 - ((N)&0xF), ((N)&0xF0) ? 0 : 18 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 19 - ((N)&0xF), ((N)&0xF0) ? 0 : 20 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 21 - ((N)&0xF), ((N)&0xF0) ? 0 : 22 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 23 - ((N)&0xF), ((N)&0xF0) ? 0 : 24 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 25 - ((N)&0xF), ((N)&0xF0) ? 0 : 26 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 27 - ((N)&0xF), ((N)&0xF0) ? 0 : 28 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 29 - ((N)&0xF), ((N)&0xF0) ? 0 : 30 - ((N)&0xF),
-                ((N)&0xF0) ? 0 : 31 - ((N)&0xF));
+                wasm_i64x2_const(0, 0), x, ((N) & 0xF0) ? 0 : 16 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 17 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 18 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 19 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 20 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 21 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 22 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 23 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 24 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 25 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 26 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 27 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 28 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 29 - ((N) & 0xF), ((N) & 0xF0) ? 0 : 30 - ((N) & 0xF),
+                ((N) & 0xF0) ? 0 : 31 - ((N) & 0xF));
         }
 
         // slide_right
         template <size_t N, class A, class T>
         inline batch<T, A> slide_right(batch<T, A> const& x, requires_arch<wasm>) noexcept
         {
             return wasm_i8x16_shuffle(
-                x, wasm_i64x2_const(0, 0), ((N)&0xF0) ? 16 : ((N)&0xF) + 0,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 1, ((N)&0xF0) ? 16 : ((N)&0xF) + 2,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 3, ((N)&0xF0) ? 16 : ((N)&0xF) + 4,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 5, ((N)&0xF0) ? 16 : ((N)&0xF) + 6,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 7, ((N)&0xF0) ? 16 : ((N)&0xF) + 8,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 9, ((N)&0xF0) ? 16 : ((N)&0xF) + 10,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 11, ((N)&0xF0) ? 16 : ((N)&0xF) + 12,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 13, ((N)&0xF0) ? 16 : ((N)&0xF) + 14,
-                ((N)&0xF0) ? 16 : ((N)&0xF) + 15);
+                x, wasm_i64x2_const(0, 0), ((N) & 0xF0) ? 16 : ((N) & 0xF) + 0,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 1, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 2,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 3, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 4,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 5, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 6,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 7, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 8,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 9, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 10,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 11, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 12,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 13, ((N) & 0xF0) ? 16 : ((N) & 0xF) + 14,
+                ((N) & 0xF0) ? 16 : ((N) & 0xF) + 15);
         }
 
         // sadd

diff --git a/include/xsimd/config/xsimd_arch.hpp b/include/xsimd/config/xsimd_arch.hpp
@@ -191,9 +191,9 @@ namespace xsimd
     {
     };
     using all_x86_architectures = arch_list<
-            avx512vnni<avx512vbmi>, avx512vbmi, avx512ifma, avx512pf, avx512vnni<avx512bw>, avx512bw, avx512er, avx512dq, avx512cd, avx512f,
-            avxvnni, fma3<avx2>, avx2, fma3<avx>, avx, fma4, fma3<sse4_2>,
-            sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>;
+        avx512vnni<avx512vbmi>, avx512vbmi, avx512ifma, avx512pf, avx512vnni<avx512bw>, avx512bw, avx512er, avx512dq, avx512cd, avx512f,
+        avxvnni, fma3<avx2>, avx2, fma3<avx>, avx, fma4, fma3<sse4_2>,
+        sse4_2, sse4_1, /*sse4a,*/ ssse3, sse3, sse2>;
 
     using all_sve_architectures = arch_list<detail::sve<512>, detail::sve<256>, detail::sve<128>>;
     using all_rvv_architectures = arch_list<detail::rvv<512>, detail::rvv<256>, detail::rvv<128>>;

diff --git a/include/xsimd/types/xsimd_all_registers.hpp b/include/xsimd/types/xsimd_all_registers.hpp
@@ -22,8 +22,8 @@
 #include "xsimd_fma3_avx2_register.hpp"
 #include "xsimd_fma3_avx_register.hpp"
 
-#include "xsimd_avx512vnni_avx512vbmi_register.hpp"
 #include "xsimd_avx512vnni_avx512bw_register.hpp"
+#include "xsimd_avx512vnni_avx512vbmi_register.hpp"
 
 #include "xsimd_avx512ifma_register.hpp"
 #include "xsimd_avx512vbmi_register.hpp"

diff --git a/include/xsimd/types/xsimd_avx512vnni_avx512bw_register.hpp b/include/xsimd/types/xsimd_avx512vnni_avx512bw_register.hpp
@@ -16,15 +16,15 @@
 
 namespace xsimd
 {
-    template<typename arch>
+    template <typename arch>
     struct avx512vnni;
 
     /**
      * @ingroup architectures
      *
      * AVX512VNNI instructions
      */
-    template<>
+    template <>
     struct avx512vnni<avx512bw> : avx512bw
     {
         static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VNNI_AVX512BW; }

diff --git a/include/xsimd/types/xsimd_avx512vnni_avx512vbmi_register.hpp b/include/xsimd/types/xsimd_avx512vnni_avx512vbmi_register.hpp
@@ -16,15 +16,15 @@
 
 namespace xsimd
 {
-    template<typename arch>
+    template <typename arch>
     struct avx512vnni;
 
     /**
      * @ingroup architectures
      *
      * AVX512VNNI instructions
      */
-    template<>
+    template <>
     struct avx512vnni<avx512vbmi> : avx512vbmi
     {
         static constexpr bool supported() noexcept { return XSIMD_WITH_AVX512VNNI_AVX512VBMI; }

diff --git a/include/xsimd/types/xsimd_batch_constant.hpp b/include/xsimd/types/xsimd_batch_constant.hpp
@@ -88,7 +88,7 @@ namespace xsimd
 #define MAKE_BINARY_OP(OP, NAME)                                                            \
     template <bool... OtherValues>                                                          \
     constexpr auto operator OP(batch_bool_constant<batch_type, OtherValues...> other) const \
-        ->decltype(apply<NAME>(*this, other))                                               \
+        -> decltype(apply<NAME>(*this, other))                                              \
     {                                                                                       \
         return apply<NAME>(*this, other);                                                   \
     }
@@ -199,7 +199,7 @@ namespace xsimd
 #define MAKE_BINARY_OP(OP, NAME)                                                       \
     template <value_type... OtherValues>                                               \
     constexpr auto operator OP(batch_constant<batch_type, OtherValues...> other) const \
-        ->decltype(apply<NAME>(*this, other))                                          \
+        -> decltype(apply<NAME>(*this, other))                                         \
     {                                                                                  \
         return apply<NAME>(*this, other);                                              \
     }