v1.12

UPDATE

@@ -194,11 +194,12 @@ Update history:
       with b-bit branch history table (BHT) indexing, p-bit pattern history
       table (PHT) indexing, and h-bit branch history per BHT entry.
 
-* Version 1.12 (Mar 21, 2024)
+* Version 1.12 (Mar 22, 2024)
     - Debug messages for SB-type instructions are updated to print actual
       branch results (i.e., inst->branch_taken) after they are resolved in
       the execute stage. If the branch predictor option is enabled (i.e.,
       OPT=-DBR_PRED), branch prediction results (i.e., inst->pred_taken)
       are printed from the fetch stage, but the actual branch results show
       up from the execute stage.
+    - The memeory_state file was renamed to mem_state.
 

data_memory.cc

@@ -38,7 +38,7 @@ data_memory_t::data_memory_t(uint64_t *m_ticks, uint64_t m_memory_size,
     memset(accessed, 0, num_dwords * sizeof(bool));
 
     // Load initial memory state.
-    load_memory_state();
+    load_mem_state();
 }
 
 data_memory_t::~data_memory_t() {
@@ -86,12 +86,12 @@ void data_memory_t::load_block(uint64_t m_addr, uint64_t m_block_size) {
 }
 
 // Load initial memory state.
-void data_memory_t::load_memory_state() {
+void data_memory_t::load_mem_state() {
     // Open a memory state file.
     fstream file_stream;
-    file_stream.open("memory_state", fstream::in);
+    file_stream.open("mem_state", fstream::in);
     if(!file_stream.is_open()) {
-        cerr << "Error: failed to open memory_state" << endl;
+        cerr << "Error: failed to open mem_state" << endl;
         exit(1);
     }
 
@@ -117,7 +117,7 @@ void data_memory_t::load_memory_state() {
            !addr_str.length()    || !data_str.length()) {
             cerr << "Error: invalid memory address and/or data " << addr_str
                  << " = " << data_str << " at line #" << line_num
-                 << " of memory_state" << endl;
+                 << " of mem_state" << endl;
             exit(1);
         }
 
@@ -127,21 +127,21 @@ void data_memory_t::load_memory_state() {
         // Check the alignment of memory address.
         if(memory_addr & 0b111) {
             cerr << "Error: invalid alignment of memory address " << memory_addr
-                 << " at line #" << line_num << " of memory_state" << endl;
+                 << " at line #" << line_num << " of mem_state" << endl;
             exit(1);
         }
         // The memory address goes out of bounds.
         if((memory_addr+8) > memory_size) {
             cerr << "Error: memory address " << memory_addr << " is out of bounds"
-                 << " at line #" << line_num << " of memory_state" << endl;
+                 << " at line #" << line_num << " of mem_state" << endl;
             exit(1);
         }
         // Check if multiple different values are defined at the same memory address.
         int64_t &dword = memory[memory_addr>>3];
         if(dword && (dword != memory_data)) {
             cerr << "Error: memory address " << memory_addr
                  << " has multiple values defined at line # " << line_num
-                 << " of memory_state" << endl;
+                 << " of mem_state" << endl;
             exit(1);
         }
         // Store the memory data.

data_memory.h

@@ -18,7 +18,7 @@ class data_memory_t {
     void print_state() const;                               // Print memory state.
 
 private:
-    void load_memory_state();                               // Load initial memory state.
+    void load_mem_state();                                  // Load initial memory state.
 
     data_cache_t *cache;                                    // Pointer to the upper-level cache
     uint64_t *ticks;                                        // Pointer to processor ticks

doc/kite.tex

@@ -172,7 +172,7 @@ \section{Program Code, Register and Memory States} \label{sec:inputs}
 A program code executes the instructions based on the defined register state.
 Since the {\tt\small x0} register in RISC-V is hard-wired to zero \cite{patterson_morgan2017}, assigning non-zero values to it is automatically discarded.
 
-Memory state refers to the {\tt\small memory\char`_state} file that contains the initial values of the data memory.
+Memory state refers to the {\tt\small mem\char`_state} file that contains the initial values of the data memory.
 Every address in the memory state file must be a multiple of 8 to align with doubleword data.
 The following shows an example of the memory state file.
 
@@ -433,7 +433,7 @@ \section{Implementation} \label{sec:implementation}
     If the ALU gets a multi-cycle instruction such as {\tt\small div} or {\tt\small mul}, all subsequent instructions stall until the ALU becomes free.
 \item
     {\tt\small data\char`_memory.h/cc} files implement the data memory that holds data values.
-    When a simulation starts, the data memory loads a state file (i.e., {\tt\small memory\char`_state}) to set memory addresses to store the defined values.
+    When a simulation starts, the data memory loads a state file (i.e., {\tt\small mem\char`_state}) to set memory addresses to store the defined values.
     To align with 64-bit registers, the data memory requires that the memory address of a load or store instruction is a multiple of 8.
     The default size of the data memory is 4KB, which is modifiable in {\tt\small data\char`_memory\char`_t()}.
     Memory addresses belonging to the code segment are inaccessible because the code segment is prohibited from data access.