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yaz180 - i2c WIP2
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feilipu committed Oct 9, 2017
1 parent bc3031a commit f18092a
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Showing 27 changed files with 988 additions and 182 deletions.
12 changes: 4 additions & 8 deletions libsrc/_DEVELOPMENT/target/yaz180/config/config_pca9665.m4
Expand Up @@ -73,8 +73,7 @@ define(`__IO_I2C_CON_MODE', 0x01) # Mode, 1 = buffered, 0 = byte

# Bits in I2C_CON Echo, for CPU control

define(`__IO_I2C_CON_ECHO_BUS_STOP', 0x10) # We are finished the sentence
define(`__IO_I2C_CON_ECHO_SI', 0x08) # Serial Interrupt Received
define(`__IO_I2C_CON_ECHO_BUS_STOPPED', 0x10) # We are finished the sentence
define(`__IO_I2C_CON_ECHO_BUS_RESTART', 0x04) # Bus Restart Requested
define(`__IO_I2C_CON_ECHO_BUS_ILLEGAL', 0x02) # Unexpected Bus Response

Expand Down Expand Up @@ -162,8 +161,7 @@ PUBLIC `__IO_I2C_CON_STO'
PUBLIC `__IO_I2C_CON_SI'
PUBLIC `__IO_I2C_CON_MODE'

PUBLIC `__IO_I2C_CON_ECHO_BUS_STOP'
PUBLIC `__IO_I2C_CON_ECHO_SI'
PUBLIC `__IO_I2C_CON_ECHO_BUS_STOPPED'
PUBLIC `__IO_I2C_CON_ECHO_BUS_RESTART'
PUBLIC `__IO_I2C_CON_ECHO_BUS_ILLEGAL'

Expand Down Expand Up @@ -239,8 +237,7 @@ defc `__IO_I2C_CON_STO' = __IO_I2C_CON_STO
defc `__IO_I2C_CON_SI' = __IO_I2C_CON_SI
defc `__IO_I2C_CON_MODE' = __IO_I2C_CON_MODE

defc `__IO_I2C_CON_ECHO_BUS_STOP' = __IO_I2C_CON_ECHO_BUS_STOP
defc `__IO_I2C_CON_ECHO_SI' = __IO_I2C_CON_ECHO_SI
defc `__IO_I2C_CON_ECHO_BUS_STOPPED' = __IO_I2C_CON_ECHO_BUS_STOPPED
defc `__IO_I2C_CON_ECHO_BUS_RESTART' = __IO_I2C_CON_ECHO_BUS_RESTART
defc `__IO_I2C_CON_ECHO_BUS_ILLEGAL' = __IO_I2C_CON_ECHO_BUS_ILLEGAL

Expand Down Expand Up @@ -365,8 +362,7 @@ ifdef(`CFG_C_DEF',
`#define' `__IO_I2C_CON_SI' __IO_I2C_CON_SI
`#define' `__IO_I2C_CON_MODE' __IO_I2C_CON_MODE

`#define' `__IO_I2C_CON_ECHO_BUS_STOP' __IO_I2C_CON_ECHO_BUS_STOP
`#define' `__IO_I2C_CON_ECHO_SI' __IO_I2C_CON_ECHO_SI
`#define' `__IO_I2C_CON_ECHO_BUS_STOPPED' __IO_I2C_CON_ECHO_BUS_STOPPED
`#define' `__IO_I2C_CON_ECHO_BUS_RESTART' __IO_I2C_CON_ECHO_BUS_RESTART
`#define' `__IO_I2C_CON_ECHO_BUS_ILLEGAL' __IO_I2C_CON_ECHO_BUS_ILLEGAL

Expand Down
3 changes: 1 addition & 2 deletions libsrc/_DEVELOPMENT/target/yaz180/config_yaz180.h
Expand Up @@ -925,8 +925,7 @@
#define __IO_I2C_CON_SI 0x08
#define __IO_I2C_CON_MODE 0x01

#define __IO_I2C_CON_ECHO_BUS_STOP 0x10
#define __IO_I2C_CON_ECHO_SI 0x08
#define __IO_I2C_CON_ECHO_BUS_STOPPED 0x10
#define __IO_I2C_CON_ECHO_BUS_RESTART 0x04
#define __IO_I2C_CON_ECHO_BUS_ILLEGAL 0x02

Expand Down
3 changes: 1 addition & 2 deletions libsrc/_DEVELOPMENT/target/yaz180/config_yaz180_private.inc
Expand Up @@ -870,8 +870,7 @@ defc __IO_I2C_CON_STO = 0x10
defc __IO_I2C_CON_SI = 0x08
defc __IO_I2C_CON_MODE = 0x01

defc __IO_I2C_CON_ECHO_BUS_STOP = 0x10
defc __IO_I2C_CON_ECHO_SI = 0x08
defc __IO_I2C_CON_ECHO_BUS_STOPPED = 0x10
defc __IO_I2C_CON_ECHO_BUS_RESTART = 0x04
defc __IO_I2C_CON_ECHO_BUS_ILLEGAL = 0x02

Expand Down
6 changes: 2 additions & 4 deletions libsrc/_DEVELOPMENT/target/yaz180/config_yaz180_public.inc
Expand Up @@ -1554,8 +1554,7 @@ PUBLIC __IO_I2C_CON_STO
PUBLIC __IO_I2C_CON_SI
PUBLIC __IO_I2C_CON_MODE

PUBLIC __IO_I2C_CON_ECHO_BUS_STOP
PUBLIC __IO_I2C_CON_ECHO_SI
PUBLIC __IO_I2C_CON_ECHO_BUS_STOPPED
PUBLIC __IO_I2C_CON_ECHO_BUS_RESTART
PUBLIC __IO_I2C_CON_ECHO_BUS_ILLEGAL

Expand Down Expand Up @@ -1627,8 +1626,7 @@ defc __IO_I2C_CON_STO = 0x10
defc __IO_I2C_CON_SI = 0x08
defc __IO_I2C_CON_MODE = 0x01

defc __IO_I2C_CON_ECHO_BUS_STOP = 0x10
defc __IO_I2C_CON_ECHO_SI = 0x08
defc __IO_I2C_CON_ECHO_BUS_STOPPED = 0x10
defc __IO_I2C_CON_ECHO_BUS_RESTART = 0x04
defc __IO_I2C_CON_ECHO_BUS_ILLEGAL = 0x02

Expand Down
26 changes: 11 additions & 15 deletions libsrc/_DEVELOPMENT/target/yaz180/crt_interrupt_vectors_basic.inc
Expand Up @@ -7,8 +7,6 @@ PUBLIC _z180_rst_20h_vector, _z180_rst_28h_vector, _z180_rst_30h_vector
PUBLIC _z180_rst_38h_vector
PUBLIC _z180_nmi_vector

EXTERN __Z80_VECTOR_BASE_BASIC

defc _z180_trap_vector = __Z80_VECTOR_BASE_BASIC+0x01
defc _z180_rst_08h_vector = __Z80_VECTOR_BASE_BASIC+0x05
defc _z180_rst_10h_vector = __Z80_VECTOR_BASE_BASIC+0x09
Expand All @@ -26,18 +24,16 @@ PUBLIC z180_int_dma0, z180_int_dma1
PUBLIC z180_int_csio
PUBLIC z180_int_asci0, z180_int_asci1

EXTERN __Z180_VECTOR_IL_BASIC

defc Z180_VECTOR_BASE = __Z80_VECTOR_BASE_BASIC-(__Z80_VECTOR_BASE_BASIC%(0x100))+__Z180_VECTOR_IL_BASIC

defc z180_int_int1 = Z180_VECTOR_BASE+0x00
defc z180_int_int2 = Z180_VECTOR_BASE+0x02
defc z180_int_prt0 = Z180_VECTOR_BASE+0x04
defc z180_int_prt1 = Z180_VECTOR_BASE+0x06
defc z180_int_dma0 = Z180_VECTOR_BASE+0x08
defc z180_int_dma1 = Z180_VECTOR_BASE+0x0A
defc z180_int_csio = Z180_VECTOR_BASE+0x0C
defc z180_int_asci0 = Z180_VECTOR_BASE+0x0E
defc z180_int_asci1 = Z180_VECTOR_BASE+0x10
defc Z180_VECTOR_BASE_BASIC = __Z80_VECTOR_BASE_BASIC-(__Z80_VECTOR_BASE_BASIC%(0x100))+__Z180_VECTOR_IL_BASIC

defc z180_int_int1 = Z180_VECTOR_BASE_BASIC+0x00
defc z180_int_int2 = Z180_VECTOR_BASE_BASIC+0x02
defc z180_int_prt0 = Z180_VECTOR_BASE_BASIC+0x04
defc z180_int_prt1 = Z180_VECTOR_BASE_BASIC+0x06
defc z180_int_dma0 = Z180_VECTOR_BASE_BASIC+0x08
defc z180_int_dma1 = Z180_VECTOR_BASE_BASIC+0x0A
defc z180_int_csio = Z180_VECTOR_BASE_BASIC+0x0C
defc z180_int_asci0 = Z180_VECTOR_BASE_BASIC+0x0E
defc z180_int_asci1 = Z180_VECTOR_BASE_BASIC+0x10

ENDIF

This file was deleted.

@@ -1,4 +1,3 @@
target/yaz180/device/pca9665/__pca9665_data
target/yaz180/device/pca9665/pca9665_read_burst
target/yaz180/device/pca9665/pca9665_read_direct
target/yaz180/device/pca9665/pca9665_read_indirect
Expand Down
Expand Up @@ -6,26 +6,24 @@
PUBLIC pca9665_read_burst

;Do a burst read from the direct registers
;input B = number of bytes to read < $FF
;input C = device addr | direct register address ($DR)
;input HL = starting adddress of 256 byte aligned output buffer
;input B = number of bytes to read, max 68 in hardware buffer
;input C = device addr | direct register address (ddd000rr)
;input HL = starting adddress of 256 byte aligned input buffer
;output HL = finishing address
;FIXME do this with DMA
pca9665_read_burst:
push af
push de
ld d, h
ld a, b ;keep iterative count in A
ld d, h ;remember the buffer MSB
ld e, b ;keep iterative count in E
pca9665_rd_bst:
ld b, c ;prepare device and register address
;lower address bits (0x1F) of B irrelevant
;upper address bits (0xFC) of C irrelevant
ld h, d ;wrap the buffer address MSB
ld h, d ;unwrap the buffer address MSB
ini ;read the byte (HL++)
dec a ;keep iterative count in A
jr nz, pca9665_rd_bst
dec e ;keep iterative count in E
jr NZ, pca9665_rd_bst
pop de
pop af
ret

Expand Up @@ -4,14 +4,14 @@
PUBLIC pca9665_read_direct

;Do a read from the direct registers
;input C = device addr | direct register address ($DR)
;input C = device addr | direct register address (ddd000rr)
;output A = byte read

pca9665_read_direct:
push bc ;preserve the device and register address
ld b, c ;prepare device and register address
;lower address bits (0x1F) of B irrelevant
;upper address bits (0xFC) of C irrelevant
;upper address bits (0xFC) of C not evaluated
in a, (c) ;get the data from the register
pop bc
ret
Expand Down
Expand Up @@ -6,7 +6,7 @@
PUBLIC pca9665_read_indirect

;Do a read from the indirect registers
;input C = device addr | indirect register address ($DR)
;input C = device addr | indirect register address (ddd000rr)
;output A = byte read
;preserves device and register address in BC
Expand All @@ -15,10 +15,10 @@ pca9665_read_indirect:
ld b, c ;prepare device and register address
;lower address bits (0x1F) of B irrelevant
ld a, c ;prepare indirect address in A
and $07 ;ensure upper bits are zero
and $07 ;ensure upper bits are zero when writing to IPTR
ld c, __IO_I2C_PORT_IPTR
out (c), a ;write the indirect address to the __IO_I2C_PORT_IPTR
ld c, __IO_I2C_PORT_IDATA ;prepare device and indirect register address
ld c, __IO_I2C_PORT_IDATA ;prepare device and indirect register address
;lower address bits (0x1F) of B irrelevant
in a, (c) ;get the byte from the indirect register
pop bc
Expand Down
Expand Up @@ -6,26 +6,24 @@
PUBLIC pca9665_write_burst

;Do a burst write to the direct registers
;input B = number of bytes to write < $FF
;input C = device addr | direct register address ($DR)
;input HL = starting adddress of 256 byte aligned input buffer
;input B = number of bytes to write, max 68 to hardware buffer
;input C = device addr | direct register address (ddd000rr)
;input HL = starting adddress of 256 byte aligned output buffer
;output HL = finishing address
;FIXME do this with DMA
pca9665_write_burst:
push af
push de
ld d, h
ld a, b ;keep iterative count in A
ld d, h ;remember the buffer MSB
ld e, b ;keep iterative count in E
pca9665_wr_bst:
ld b, c ;prepare device and register address
;lower address bits (0x1F) of B irrelevant
;upper address bits (0xFC) of C irrelevant
ld h, d ;wrap the buffer address MSB
ld h, d ;unwrap the buffer address MSB
outi ;write the byte (HL++)
dec a ;keep iterative count in A
jr nz, pca9665_wr_bst
dec e ;keep iterative count in E
jr NZ, pca9665_wr_bst
pop de
pop af
ret

Expand Up @@ -4,14 +4,14 @@
PUBLIC pca9665_write_direct

;Do a write to the direct registers
;input C = device addr | direct register address ($DR)
;input C = device addr | direct register address (ddd000rr)
;input A = byte to write

pca9665_write_direct:
push bc ;preserve the device and register address
ld b, c ;prepare device and register address
;lower address bits (0x1F) of B irrelevant
;upper address bits (0xFC) of C irrelevant
;upper address bits (0xFC) of C not evaluated
out (c), a
pop bc
ret
Expand Down
Expand Up @@ -6,7 +6,7 @@
PUBLIC pca9665_write_indirect

;Do a write to the indirect registers
;input C = device addr | direct register address ($DR)
;input C = device addr | direct register address (ddd000rr)
;input A = byte to write
;preserves device and register address in BC

Expand Down

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