Skip to content
View zaellis's full-sized avatar
🦆
Quack
🦆
Quack

Highlights

  • Pro

Organizations

@PurdueElectricRacing
Block or Report

Block or report zaellis

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned

  1. continue_with_sv continue_with_sv Public

    Software and resources to help Purdue students (and others) continue developing with SystemVerilog after losing access to proprietary tools.

    Makefile 12 2

  2. caravel_user_project caravel_user_project Public

    Forked from efabless/caravel_user_project

    https://caravel-user-project.readthedocs.io

    Verilog 3 1

  3. PurdueElectricRacing/LapSim PurdueElectricRacing/LapSim Public

    Lap Simulation in Matlab

    MATLAB 2 1

  4. ASCON_code-a-chip ASCON_code-a-chip Public

    ASCON implementation for IEEE SSCS Code a Chip

    Jupyter Notebook

  5. 270Computer 270Computer Public

    Generate UART output code from plain text file

    C 1