PS2-keyboard-protocol-implementation-in-SystemVerilog

Abstract

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Implementation of the ps2 protocol for the keyboard, where the device is a keyboard with a ps2 serial port, and the host is an Altera Cyclone® V FPGA board.

Implementation involves going through all stages of software development for hardware:

1. Simulation using Verilog and Altera ModelSim
2. Synthesis using Verilog and Quartus II
3. Verification using SystemVerilog and QuestaSim

Navigation

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In the folder

  src/simulation

there are source files used for the simulation. In the subfolder modules there are implementations of the used module written in Verilog.
In addition, there is a file testbench_uvm, which represents the source code for verification, written in SystemVerilog using the standard library UVM (Universal Verification Methodology library).

The

  src/synthesis

path contains files relevant to synthesis on the Altera Cyclone® V FPGA board.
The path

  src/synthesis/modules

contains the implemented modules:

1. deb.v which is a debouncer for the keyboard clock signal
2. hex.v which is a module for reading hex values on the seven-segment display of the FPGA board
3. ps2.v which represents the main module in which the logic of the protocol is implemented

On the path src/syntesis/ there is also the file DEO_TOP0.v which represents the file in which things are instantiated and from which the program for the FPGA board will be synthesized.

Starting up

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Before starting, make sure you have pre-installed Altera ModelSim, Quartus II and QuestaSim as well as connected Altera Cyclone® V FPGA board.

In order to start one of the development phases, it is necessary to use the makefile located in the path:

  src/tooling/xpack/makefile

If it is started from the Windows operating system, it is necessary to install and run Cygwin in order to simulate linux functions on windows from the terminal.

Inside the makefile, with the:

  help

command, we get a list of possible commands for starting phases.

The command:

  simul_run

starts the verification, while the command:

  synth_pgm

starts the tools of the synthesis program and puts program to the connected FPGA board.

Implementation

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The goal of the project was to implement this protocol so that the last two bytes of pressed and released keyboard codes (make and break codes) are displayed on the seven-segment display of an Altera Cyclone® V FPGA board. I wrote the software for this board so that the board and the keyboard can communicate via ps2 protocol and send values that will be shown on the display.

Specification:

• PS/2 protocol is a serial protocol for communication between devices and keyboards.
• Communication is performed using two signals:
1. PS2_KBCLK which represents the keyboard clock signal (10-16.7kH) to which data is sent.
2. PS2_KBDAT through which data from the keyboard is sent serially.
• Data is sent on the falling edge of the keyboard clock signal.
• When no data is sent, the PS2_KBDAT signal has a value of one.
• Sending data starts with the START bit (value 0), followed by 8 DATA bits (sent first the lowest bit), followed by the ODD_PARITY bit (odd parity), and finally the STOP bit is sent (value 1).
• If a key whose make code has more than one byte is pressed, older bytes are sent first, using the same principle as sending from the lowest bits
• When a button on the keyboard is pressed or released, the keyboard sends a code over the protocol pressed (make code) or released (break code) button.
• The code can be of different lengths (1B, 2B, 4B, ...).
• The code of the released button is formed by adding F0 to the code of the pressed button the two highest bytes.
• If a button whose make code is larger than one byte is released, then a break code is created by adding F0 between the first and second byte.