Update Thu Apr 1 20:13:30 PDT 2021

content/CS137/CS137-lecture-20210330.md

@@ -3,7 +3,7 @@ title: "CS137-lecture-20210330"
 # date: 2021-03-30T18:52:44-07:00
 draft: false
 bookToc: true
-tags: ["sequential circuits", "finite state machine", "moore machine", "mealy machine"]
+tags: ["sequential circuits", "finite state machine", "moore machine"]
 ---
 
 # Finite state machine design cont.
@@ -16,7 +16,7 @@ tags: ["sequential circuits", "finite state machine", "moore machine", "mealy ma
 - There is more hardware requirement
 - They react slower to inputs (one clock cycle later)
 - Synchronous output and state generation
-- Output is placed on states
+- **Output is placed on states**
 - Easy to design
 
 ![image_2021-03-30-19-05-34](/notes/image_2021-03-30-19-05-34.png)
@@ -27,7 +27,7 @@ Step 1: create a FSD
 
 Step 2: determine the minimum number of states/bits required to store states
 
-Number of bits = {{<k>}} \log_2(k) = \log_2(4) = 2 {{</k>}}, where
+Number of bits = {{<k>}} \lceil \log_2(k) \rceil = \lceil \log_2(4)\rceil = 2 {{</k>}}, where
 {{<k>}} k = \text{number of states}  {{</k>}}.
 
 Step 3: From FSD, create the truth table for NSG (next state generator)
@@ -62,7 +62,7 @@ Then we can build a SOP for {{<k>}} d_1 {{</k>}} (and simplify):
 \begin{aligned}
      d_1 &= \overline{x} \overline{q_1} q_0 + \overline{x} q_1 q_0 + x q_1 \overline{q_0} \\
      &= \overline{x} (\overline{q_1} q_0 + q_1 q_0) + x q_1 \overline{q_0} \\
-     &= \overline{x} q_0 + x q_1 q_0
+     &= \overline{x} q_0 + x q_1 \overline{q_0}
 \end{aligned}
 {{</k>}}
 
@@ -74,14 +74,3 @@ We can also find the SOP for our output {{<k>}} Z {{</k>}}:
 \end{aligned}
 {{</k>}}
 
-## Mealy machines
-
-- Output depends on present state as well as present input
-- If input changes, output also changes
-- Less number of states are required
-- There is less hardware requirements
-- They react faster to inputs
-- Asynchronous output generation
-- Output is placed on transitions
-- It is difficult to design
-

content/CS137/CS137-lecture-20210401.md

@@ -0,0 +1,71 @@
+---
+title: "CS137-lecture-20210401"
+# date: 2021-04-01T18:54:31-07:00
+draft: false
+bookToc: true
+tags: ["finite state machine", "moore machine", "mealy machine"]
+---
+
+# Finite state machine design cont. 
+
+## Moore machine design cont.
+
+Recall
+
+{{<k display>}}
+\begin{aligned}
+     d_0 &= x \\
+     d_1 &= \overline{x} q_0 + x q_1 \overline{q_0} \\
+     Z &= q_0 q_1
+\end{aligned}
+{{</k>}}
+
+Step 5: Circuit diagram
+
+![image_2021-04-01-19-22-56](/notes/image_2021-04-01-19-22-56.png)
+
+## Mealy machine design
+
+- Output depends on present state as well as present input
+- If input changes, output also changes
+- Less number of states are required
+- There is less hardware requirements
+- They react faster to inputs
+- Asynchronous output generation
+- **Output is placed on transitions**
+- It is difficult to design
+
+We will design a Mealy machine that detects the same overlapping "101".
+
+Step 1: Generate the FSD (finite state diagram) for the machine
+
+![image_2021-04-01-19-37-28](/notes/image_2021-04-01-19-37-28.png)
+
+Step 2: Determine the number of bits needed to store the states
+
+{{<k>}} \text{number of bits } = \lceil \log_2(k) \rceil = \lceil \log_2(3) \rceil = 2 {{</k>}}, where {{<k>}} k = \text{ number of states}  {{</k>}}
+
+Step 3: From FSD, create the truth table where
+
+{{<k>}} A = 00 \\
+B = 01 \\
+C = 10 \\
+D = 11{{</k>}}
+
+![image_2021-04-01-19-43-25](/notes/image_2021-04-01-19-43-25.png)
+
+Step 4: Determine the logical expressions
+
+{{<k display>}}
+\begin{aligned}
+    d_0 &= x \\
+    d_1 &= q_0 \\
+    Z &= q_1 x
+\end{aligned}
+{{</k>}}
+
+Step 5: Draw the circuit diagram
+
+![image_2021-04-01-19-50-18](/notes/image_2021-04-01-19-50-18.png)
+
+

content/CS138/CS138-lecture-20210330.md

@@ -3,7 +3,7 @@ title: "CS138-lecture-20210330"
 # date: 2021-03-30T08:59:26-07:00
 draft: false
 bookToc: true
-tags: ["piplined protocols", "go-back-n"]
+tags: ["piplined protocols", "go-back-n", "selective repeat"]
 ---
 
 ## Piplined protocols

content/CS138/CS138-lecture-20210401.md

@@ -0,0 +1,56 @@
+---
+title: "CS138-lecture-20210401"
+# date: 2021-04-01T08:58:13-07:00
+draft: false
+bookToc: true
+tags: ["TCP"]
+---
+
+## Connection oriented transport: TCP 
+
+![image_2021-04-01-09-00-11](/notes/image_2021-04-01-09-00-11.png)
+![image_2021-04-01-09-01-20](/notes/image_2021-04-01-09-01-20.png)
+![image_2021-04-01-09-05-56](/notes/image_2021-04-01-09-05-56.png)
+
+Entire header size is {{<k>}} 32 \text{ bits } \cdot 5 = 160 \text{ bits } = 20 \text{ bytes }  {{</k>}}.
+The receive window is used for flow control.
+
+![image_2021-04-01-09-11-26](/notes/image_2021-04-01-09-11-26.png)
+
+Sequence number example:
+
+![image_2021-04-01-09-18-12](/notes/image_2021-04-01-09-18-12.png)
+
+![image_2021-04-01-09-27-41](/notes/image_2021-04-01-09-27-41.png)
+![image_2021-04-01-09-28-03](/notes/image_2021-04-01-09-28-03.png)
+
+Both sides randomize the sequence number they will use at the beginning.
+
+![image_2021-04-01-09-30-56](/notes/image_2021-04-01-09-30-56.png)
+![image_2021-04-01-09-34-57](/notes/image_2021-04-01-09-34-57.png)
+![image_2021-04-01-09-37-14](/notes/image_2021-04-01-09-37-14.png)
+![image_2021-04-01-09-40-52](/notes/image_2021-04-01-09-40-52.png)
+
+### Reliable data transfer
+
+![image_2021-04-01-09-42-01](/notes/image_2021-04-01-09-42-01.png)
+![image_2021-04-01-09-42-09](/notes/image_2021-04-01-09-42-09.png)
+![image_2021-04-01-09-43-54](/notes/image_2021-04-01-09-43-54.png)
+![image_2021-04-01-09-50-14](/notes/image_2021-04-01-09-50-14.png)
+![image_2021-04-01-09-53-28](/notes/image_2021-04-01-09-53-28.png)
+![image_2021-04-01-09-56-13](/notes/image_2021-04-01-09-56-13.png)
+![image_2021-04-01-09-56-44](/notes/image_2021-04-01-09-56-44.png)
+![image_2021-04-01-10-00-48](/notes/image_2021-04-01-10-00-48.png)
+
+### Flow control
+
+![image_2021-04-01-10-05-07](/notes/image_2021-04-01-10-05-07.png)
+
+The difference between flow control and congestion control:
+- **Flow control** is to make sure the receiver is not overwhelmed
+- **Congestion control** is to make sure that the road (routers, other resources) is not overwhelmed
+
+![image_2021-04-01-10-09-36](/notes/image_2021-04-01-10-09-36.png)
+![image_2021-04-01-10-10-03](/notes/image_2021-04-01-10-10-03.png)
+
+

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@@ -1690,6 +1690,19 @@ <h2 class="book-brand">
         </li>
 
 
+
+        <li>
+
+
+
+
+
+    <a href="http://zedchance.github.io/notes/CS137/CS137-lecture-20210401/" class="">CS137-lecture-20210401</a>
+
+
+        </li>
+
+
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@@ -1920,6 +1933,19 @@ <h2 class="book-brand">
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+
+        <li>
+
+
+
+
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+    <a href="http://zedchance.github.io/notes/CS138/CS138-lecture-20210401/" class="">CS138-lecture-20210401</a>
+
+
+        </li>
+
+
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docs/CS10/index.html

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+
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+
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+
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+    <a href="http://zedchance.github.io/notes/CS137/CS137-lecture-20210401/" class="">CS137-lecture-20210401</a>
+
+
+        </li>
+
+
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+
+        <li>
+
+
+
+
+
+    <a href="http://zedchance.github.io/notes/CS138/CS138-lecture-20210401/" class="">CS138-lecture-20210401</a>
+
+
+        </li>
+
+
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docs/CS12/CS12-lecture-notes/index.html

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 <!--
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+
+        <li>
+
+
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+
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+    <a href="http://zedchance.github.io/notes/CS137/CS137-lecture-20210401/" class="">CS137-lecture-20210401</a>
+
+
+        </li>
+
+
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+
+        <li>
+
+
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+    <a href="http://zedchance.github.io/notes/CS138/CS138-lecture-20210401/" class="">CS138-lecture-20210401</a>
+
+
+        </li>
+
+
   </ul>
 
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+
+        <li>
+
+
+
+
+
+    <a href="http://zedchance.github.io/notes/CS137/CS137-lecture-20210401/" class="">CS137-lecture-20210401</a>
+
+
+        </li>
+
+
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+
+        <li>
+
+
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+    <a href="http://zedchance.github.io/notes/CS138/CS138-lecture-20210401/" class="">CS138-lecture-20210401</a>
+
+
+        </li>
+
+
   </ul>
 
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