Kconfig.cpu

# SPDX-License-Identifier: GPL-2.0
# Put here option for CPU selection and depending optimization
choice
	prompt "Processor family"
	default M686 if X86_32
	default GENERIC_CPU if X86_64
	help
	  This is the processor type of your CPU. This information is
	  used for optimizing purposes. In order to compile a kernel
	  that can run on all supported x86 CPU types (albeit not
	  optimally fast), you can specify "486" here.

	  Note that the 386 is no longer supported, this includes
	  AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
	  UMC 486SX-S and the NexGen Nx586.

	  The kernel will not necessarily run on earlier architectures than
	  the one you have chosen, e.g. a Pentium optimized kernel will run on
	  a PPro, but not necessarily on a i486.

	  Here are the settings recommended for greatest speed:
	  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
	    SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
	  - "586" for generic Pentium CPUs lacking the TSC
	    (time stamp counter) register.
	  - "Pentium-Classic" for the Intel Pentium.
	  - "Pentium-MMX" for the Intel Pentium MMX.
	  - "Pentium-Pro" for the Intel Pentium Pro.
	  - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
	  - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
	  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
	  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
	  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
	  - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
	  - "Crusoe" for the Transmeta Crusoe series.
	  - "Efficeon" for the Transmeta Efficeon series.
	  - "Winchip-C6" for original IDT Winchip.
	  - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
	  - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
	  - "Geode GX/LX" For AMD Geode GX and LX processors.
	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
	  - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
	  - "VIA C7" for VIA C7.
	  - "Intel P4" for the Pentium 4/Netburst microarchitecture.
	  - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
	  - "Intel Atom" for the Atom-microarchitecture CPUs.
	  - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.

	  See each option's help text for additional details. If you don't know
	  what to do, choose "486".

config M486SX
	bool "486SX"
	depends on X86_32
	help
	  Select this for an 486-class CPU without an FPU such as
	  AMD/Cyrix/IBM/Intel SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5S.

config M486
	bool "486DX"
	depends on X86_32
	help
	  Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
	  486DX/DX2/DX4 and UMC U5D.

config M586
	bool "586/K5/5x86/6x86/6x86MX"
	depends on X86_32
	help
	  Select this for an 586 or 686 series processor such as the AMD K5,
	  the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
	  assume the RDTSC (Read Time Stamp Counter) instruction.

config M586TSC
	bool "Pentium-Classic"
	depends on X86_32
	help
	  Select this for a Pentium Classic processor with the RDTSC (Read
	  Time Stamp Counter) instruction for benchmarking.

config M586MMX
	bool "Pentium-MMX"
	depends on X86_32
	help
	  Select this for a Pentium with the MMX graphics/multimedia
	  extended instructions.

config M686
	bool "Pentium-Pro"
	depends on X86_32
	help
	  Select this for Intel Pentium Pro chips.  This enables the use of
	  Pentium Pro extended instructions, and disables the init-time guard
	  against the f00f bug found in earlier Pentiums.

config MPENTIUMII
	bool "Pentium-II/Celeron(pre-Coppermine)"
	depends on X86_32
	help
	  Select this for Intel chips based on the Pentium-II and
	  pre-Coppermine Celeron core.  This option enables an unaligned
	  copy optimization, compiles the kernel with optimization flags
	  tailored for the chip, and applies any applicable Pentium Pro
	  optimizations.

config MPENTIUMIII
	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
	depends on X86_32
	help
	  Select this for Intel chips based on the Pentium-III and
	  Celeron-Coppermine core.  This option enables use of some
	  extended prefetch instructions in addition to the Pentium II
	  extensions.

config MPENTIUMM
	bool "Pentium M"
	depends on X86_32
	help
	  Select this for Intel Pentium M (not Pentium-4 M)
	  notebook chips.

config MPENTIUM4
	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
	depends on X86_32
	help
	  Select this for Intel Pentium 4 chips.  This includes the
	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and
	  Pentium-4 M (not Pentium M) chips.  This option enables compile
	  flags optimized for the chip, uses the correct cache line size, and
	  applies any applicable optimizations.

	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )

	  Select this for:
	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
		-Willamette
		-Northwood
		-Mobile Pentium 4
		-Mobile Pentium 4 M
		-Extreme Edition (Gallatin)
		-Prescott
		-Prescott 2M
		-Cedar Mill
		-Presler
		-Smithfiled
	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
		-Foster
		-Prestonia
		-Gallatin
		-Nocona
		-Irwindale
		-Cranford
		-Potomac
		-Paxville
		-Dempsey


config MK6
	bool "AMD K6/K6-II/K6-III"
	depends on X86_32
	help
	  Select this for an AMD K6-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK7
	bool "AMD Athlon/Duron/K7"
	depends on X86_32
	help
	  Select this for an AMD Athlon K7-family processor.  Enables use of
	  some extended instructions, and passes appropriate optimization
	  flags to GCC.

config MK8
	bool "AMD Opteron/Athlon64/Hammer/K8"
	help
	  Select this for an AMD Opteron or Athlon64 Hammer-family processor.
	  Enables use of some extended instructions, and passes appropriate
	  optimization flags to GCC.

config MK8SSE3
	bool "AMD Opteron/Athlon64/Hammer/K8 with SSE3"
	help
	  Select this for improved AMD Opteron or Athlon64 Hammer-family processors.
	  Enables use of some extended instructions, and passes appropriate
	  optimization flags to GCC.

config MK10
	bool "AMD 61xx/7x50/PhenomX3/X4/II/K10"
	help
	  Select this for an AMD 61xx Eight-Core Magny-Cours, Athlon X2 7x50,
	  Phenom X3/X4/II, Athlon II X2/X3/X4, or Turion II-family processor.
	  Enables use of some extended instructions, and passes appropriate
	  optimization flags to GCC.

config MBARCELONA
	bool "AMD Barcelona"
	help
	  Select this for AMD Family 10h Barcelona processors.

	  Enables -march=barcelona

config MBOBCAT
	bool "AMD Bobcat"
	help
	  Select this for AMD Family 14h Bobcat processors.

	  Enables -march=btver1

config MJAGUAR
	bool "AMD Jaguar"
	help
	  Select this for AMD Family 16h Jaguar processors.

	  Enables -march=btver2

config MBULLDOZER
	bool "AMD Bulldozer"
	help
	  Select this for AMD Family 15h Bulldozer processors.

	  Enables -march=bdver1

config MPILEDRIVER
	bool "AMD Piledriver"
	help
	  Select this for AMD Family 15h Piledriver processors.

	  Enables -march=bdver2

config MSTEAMROLLER
	bool "AMD Steamroller"
	help
	  Select this for AMD Family 15h Steamroller processors.

	  Enables -march=bdver3

config MEXCAVATOR
	bool "AMD Excavator"
	help
	  Select this for AMD Family 15h Excavator processors.

	  Enables -march=bdver4

config MZEN
	bool "AMD Zen"
	help
	  Select this for AMD Family 17h Zen processors.

	  Enables -march=znver1

config MZEN2
	bool "AMD Zen 2"
	help
	  Select this for AMD Family 17h Zen 2 processors.

	  Enables -march=znver2

config MZEN3
	bool "AMD Zen 3"
	depends on GCC_VERSION > 100300
	help
	  Select this for AMD Family 19h Zen 3 processors.

	  Enables -march=znver3

config MCRUSOE
	bool "Crusoe"
	depends on X86_32
	help
	  Select this for a Transmeta Crusoe processor.  Treats the processor
	  like a 586 with TSC, and sets some GCC optimization flags (like a
	  Pentium Pro with no alignment requirements).

config MEFFICEON
	bool "Efficeon"
	depends on X86_32
	help
	  Select this for a Transmeta Efficeon processor.

config MWINCHIPC6
	bool "Winchip-C6"
	depends on X86_32
	help
	  Select this for an IDT Winchip C6 chip.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.

config MWINCHIP3D
	bool "Winchip-2/Winchip-2A/Winchip-3"
	depends on X86_32
	help
	  Select this for an IDT Winchip-2, 2A or 3.  Linux and GCC
	  treat this chip as a 586TSC with some extended instructions
	  and alignment requirements.  Also enable out of order memory
	  stores for this CPU, which can increase performance of some
	  operations.

config MELAN
	bool "AMD Elan"
	depends on X86_32
	help
	  Select this for an AMD Elan processor.

	  Do not use this option for K6/Athlon/Opteron processors!

config MGEODEGX1
	bool "GeodeGX1"
	depends on X86_32
	help
	  Select this for a Geode GX1 (Cyrix MediaGX) chip.

config MGEODE_LX
	bool "Geode GX/LX"
	depends on X86_32
	help
	  Select this for AMD Geode GX and LX processors.

config MCYRIXIII
	bool "CyrixIII/VIA-C3"
	depends on X86_32
	help
	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
	  treat this chip as a generic 586. Whilst the CPU is 686 class,
	  it lacks the cmov extension which gcc assumes is present when
	  generating 686 code.
	  Note that Nehemiah (Model 9) and above will not boot with this
	  kernel due to them lacking the 3DNow! instructions used in earlier
	  incarnations of the CPU.

config MVIAC3_2
	bool "VIA C3-2 (Nehemiah)"
	depends on X86_32
	help
	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
	  of SSE and tells gcc to treat the CPU as a 686.
	  Note, this kernel will not boot on older (pre model 9) C3s.

config MVIAC7
	bool "VIA C7"
	depends on X86_32
	help
	  Select this for a VIA C7.  Selecting this uses the correct cache
	  shift and tells gcc to treat the CPU as a 686.

config MPSC
	bool "Intel P4 / older Netburst based Xeon"
	depends on X86_64
	help
	  Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
	  Xeon CPUs with Intel 64bit which is compatible with x86-64.
	  Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
	  Netburst core and shouldn't use this option. You can distinguish them
	  using the cpu family field
	  in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.

config MCORE2
	bool "Intel Core 2"
	help

	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
	  53xx) CPUs. You can distinguish newer from older Xeons by the CPU
	  family in /proc/cpuinfo. Newer ones have 6 and older ones 15
	  (not a typo)

	  Enables -march=core2

config MATOM
	bool "Intel Atom"
	help

	  Select this for the Intel Atom platform. Intel Atom CPUs have an
	  in-order pipelining architecture and thus can benefit from
	  accordingly optimized code. Use a recent GCC with specific Atom
	  support in order to fully benefit from selecting this option.

config MNEHALEM
	bool "Intel Nehalem"
	select X86_P6_NOP
	help

	  Select this for 1st Gen Core processors in the Nehalem family.

	  Enables -march=nehalem

config MWESTMERE
	bool "Intel Westmere"
	select X86_P6_NOP
	help

	  Select this for the Intel Westmere formerly Nehalem-C family.

	  Enables -march=westmere

config MSILVERMONT
	bool "Intel Silvermont"
	select X86_P6_NOP
	help

	  Select this for the Intel Silvermont platform.

	  Enables -march=silvermont

config MGOLDMONT
	bool "Intel Goldmont"
	select X86_P6_NOP
	help

	  Select this for the Intel Goldmont platform including Apollo Lake and Denverton.

	  Enables -march=goldmont

config MGOLDMONTPLUS
	bool "Intel Goldmont Plus"
	select X86_P6_NOP
	help

	  Select this for the Intel Goldmont Plus platform including Gemini Lake.

	  Enables -march=goldmont-plus

config MSANDYBRIDGE
	bool "Intel Sandy Bridge"
	select X86_P6_NOP
	help

	  Select this for 2nd Gen Core processors in the Sandy Bridge family.

	  Enables -march=sandybridge

config MIVYBRIDGE
	bool "Intel Ivy Bridge"
	select X86_P6_NOP
	help

	  Select this for 3rd Gen Core processors in the Ivy Bridge family.

	  Enables -march=ivybridge

config MHASWELL
	bool "Intel Haswell"
	select X86_P6_NOP
	help

	  Select this for 4th Gen Core processors in the Haswell family.

	  Enables -march=haswell

config MBROADWELL
	bool "Intel Broadwell"
	select X86_P6_NOP
	help

	  Select this for 5th Gen Core processors in the Broadwell family.

	  Enables -march=broadwell

config MSKYLAKE
	bool "Intel Skylake"
	select X86_P6_NOP
	help

	  Select this for 6th Gen Core processors in the Skylake family.

	  Enables -march=skylake

config MSKYLAKEX
	bool "Intel Skylake X"
	select X86_P6_NOP
	help

	  Select this for 6th Gen Core processors in the Skylake X family.

	  Enables -march=skylake-avx512

config MCANNONLAKE
	bool "Intel Cannon Lake"
	select X86_P6_NOP
	help

	  Select this for 8th Gen Core processors

	  Enables -march=cannonlake

config MICELAKE
	bool "Intel Ice Lake"
	select X86_P6_NOP
	help

	  Select this for 10th Gen Core processors in the Ice Lake family.

	  Enables -march=icelake-client

config MCASCADELAKE
	bool "Intel Cascade Lake"
	select X86_P6_NOP
	help

	  Select this for Xeon processors in the Cascade Lake family.

	  Enables -march=cascadelake

config MCOOPERLAKE
	bool "Intel Cooper Lake"
	depends on GCC_VERSION > 100100
	select X86_P6_NOP
	help

	  Select this for Xeon processors in the Cooper Lake family.

	  Enables -march=cooperlake

config MTIGERLAKE
	bool "Intel Tiger Lake"
	depends on GCC_VERSION > 100100
	select X86_P6_NOP
	help

	  Select this for third-generation 10 nm process processors in the Tiger Lake family.

	  Enables -march=tigerlake

config MSAPPHIRERAPIDS
	bool "Intel Sapphire Rapids"
	depends on GCC_VERSION > 110000
	select X86_P6_NOP
	help

	  Select this for third-generation 10 nm process processors in the Sapphire Rapids family.

	  Enables -march=sapphirerapids

config MROCKETLAKE
	bool "Intel Rocket Lake"
	depends on GCC_VERSION > 110000
	select X86_P6_NOP
	help

	  Select this for eleventh-generation processors in the Rocket Lake family.

	  Enables -march=rocketlake

config MALDERLAKE
	bool "Intel Alder Lake"
	depends on GCC_VERSION > 110000
	select X86_P6_NOP
	help

	  Select this for twelfth-generation processors in the Alder Lake family.

	  Enables -march=alderlake

config GENERIC_CPU
	bool "Generic-x86-64"
	depends on X86_64
	help
	  Generic x86-64 CPU.
	  Run equally well on all x86-64 CPUs.

config GENERIC_CPU2
	bool "Generic-x86-64-v2"
	depends on GCC_VERSION > 110000
	depends on X86_64
	help
	  Generic x86-64 CPU.
	  Run equally well on all x86-64 CPUs with min support of x86-64-v2.

config GENERIC_CPU3
	bool "Generic-x86-64-v3"
	depends on GCC_VERSION > 110000
	depends on X86_64
	help
	  Generic x86-64-v3 CPU with v3 instructions.
	  Run equally well on all x86-64 CPUs with min support of x86-64-v3.

config GENERIC_CPU4
	bool "Generic-x86-64-v4"
	depends on GCC_VERSION > 110000
	depends on X86_64
	help
	  Generic x86-64 CPU with v4 instructions.
	  Run equally well on all x86-64 CPUs with min support of x86-64-v4.

config MNATIVE_INTEL
	bool "Intel-Native optimizations autodetected by GCC"
	help

	  GCC 4.2 and above support -march=native, which automatically detects
	  the optimum settings to use based on your processor. Do NOT use this
	  for AMD CPUs.  Intel Only!

	  Enables -march=native

config MNATIVE_AMD
	bool "AMD-Native optimizations autodetected by GCC"
	help

	  GCC 4.2 and above support -march=native, which automatically detects
	  the optimum settings to use based on your processor. Do NOT use this
	  for Intel CPUs.  AMD Only!

	  Enables -march=native

endchoice

config X86_GENERIC
	bool "Generic x86 support"
	depends on X86_32
	help
	  Instead of just including optimizations for the selected
	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
	  generic optimizations as well. This will make the kernel
	  perform better on x86 CPUs other than that selected.

	  This is really intended for distributors who need more
	  generic optimizations.

#
# Define implied options from the CPU selection here
config X86_INTERNODE_CACHE_SHIFT
	int
	default "12" if X86_VSMP
	default X86_L1_CACHE_SHIFT

config X86_L1_CACHE_SHIFT
	int
	default "7" if MPENTIUM4 || MPSC
	default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD || X86_GENERIC || GENERIC_CPU || GENERIC_CPU2 || GENERIC_CPU3 || GENERIC_CPU4
	default "4" if MELAN || M486SX || M486 || MGEODEGX1
	default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX

config X86_F00F_BUG
	def_bool y
	depends on M586MMX || M586TSC || M586 || M486SX || M486

config X86_INVD_BUG
	def_bool y
	depends on M486SX || M486

config X86_ALIGNMENT_16
	def_bool y
	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1

config X86_INTEL_USERCOPY
	def_bool y
	depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL

config X86_USE_PPRO_CHECKSUM
	def_bool y
	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD

config X86_USE_3DNOW
	def_bool y
	depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML

#
# P6_NOPs are a relatively minor optimization that require a family >=
# 6 processor, except that it is broken on certain VIA chips.
# Furthermore, AMD chips prefer a totally different sequence of NOPs
# (which work on all CPUs).  In addition, it looks like Virtual PC
# does not understand them.
#
# As a result, disallow these if we're not compiling for X86_64 (these
# NOPs do work on all x86-64 capable chips); the list of processors in
# the right-hand clause are the cores that benefit from this optimization.
#
config X86_P6_NOP
	def_bool y
	depends on X86_64
	depends on (MCORE2 || MPENTIUM4 || MPSC || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL)

config X86_TSC
	def_bool y
	depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD) || X86_64

config X86_CMPXCHG64
	def_bool y
	depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8 || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD

# this should be set for all -march=.. options where the compiler
# generates cmov.
config X86_CMOV
	def_bool y
	depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX || MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD)

config X86_MINIMUM_CPU_FAMILY
	int
	default "64" if X86_64
	default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8 ||  MK8SSE3 || MK10 || MBARCELONA || MBOBCAT || MJAGUAR || MBULLDOZER || MPILEDRIVER || MSTEAMROLLER || MEXCAVATOR || MZEN || MZEN2 || MZEN3 || MNEHALEM || MWESTMERE || MSILVERMONT || MGOLDMONT || MGOLDMONTPLUS || MSANDYBRIDGE || MIVYBRIDGE || MHASWELL || MBROADWELL || MSKYLAKE || MSKYLAKEX || MCANNONLAKE || MICELAKE || MCASCADELAKE || MCOOPERLAKE || MTIGERLAKE || MSAPPHIRERAPIDS || MROCKETLAKE || MALDERLAKE || MNATIVE_INTEL || MNATIVE_AMD)
	default "5" if X86_32 && X86_CMPXCHG64
	default "4"

config X86_DEBUGCTLMSR
	def_bool y
	depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486SX || M486) && !UML

config IA32_FEAT_CTL
	def_bool y
	depends on CPU_SUP_INTEL || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN

config X86_VMX_FEATURE_NAMES
	def_bool y
	depends on IA32_FEAT_CTL && X86_FEATURE_NAMES

menuconfig PROCESSOR_SELECT
	bool "Supported processor vendors" if EXPERT
	help
	  This lets you choose what x86 vendor support code your kernel
	  will include.

config CPU_SUP_INTEL
	default y
	bool "Support Intel processors" if PROCESSOR_SELECT
	help
	  This enables detection, tunings and quirks for Intel processors

	  You need this enabled if you want your kernel to run on an
	  Intel CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on an Intel
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_CYRIX_32
	default y
	bool "Support Cyrix processors" if PROCESSOR_SELECT
	depends on M486SX || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
	help
	  This enables detection, tunings and quirks for Cyrix processors

	  You need this enabled if you want your kernel to run on a
	  Cyrix CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on a Cyrix
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_AMD
	default y
	bool "Support AMD processors" if PROCESSOR_SELECT
	help
	  This enables detection, tunings and quirks for AMD processors

	  You need this enabled if you want your kernel to run on an
	  AMD CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on an AMD
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_HYGON
	default y
	bool "Support Hygon processors" if PROCESSOR_SELECT
	select CPU_SUP_AMD
	help
	  This enables detection, tunings and quirks for Hygon processors

	  You need this enabled if you want your kernel to run on an
	  Hygon CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on an Hygon
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_CENTAUR
	default y
	bool "Support Centaur processors" if PROCESSOR_SELECT
	help
	  This enables detection, tunings and quirks for Centaur processors

	  You need this enabled if you want your kernel to run on a
	  Centaur CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on a Centaur
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_TRANSMETA_32
	default y
	bool "Support Transmeta processors" if PROCESSOR_SELECT
	depends on !64BIT
	help
	  This enables detection, tunings and quirks for Transmeta processors

	  You need this enabled if you want your kernel to run on a
	  Transmeta CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on a Transmeta
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_UMC_32
	default y
	bool "Support UMC processors" if PROCESSOR_SELECT
	depends on M486SX || M486 || (EXPERT && !64BIT)
	help
	  This enables detection, tunings and quirks for UMC processors

	  You need this enabled if you want your kernel to run on a
	  UMC CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on a UMC
	  CPU might render the kernel unbootable.

	  If unsure, say N.

config CPU_SUP_ZHAOXIN
	default y
	bool "Support Zhaoxin processors" if PROCESSOR_SELECT
	help
	  This enables detection, tunings and quirks for Zhaoxin processors

	  You need this enabled if you want your kernel to run on a
	  Zhaoxin CPU. Disabling this option on other types of CPUs
	  makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin
	  CPU might render the kernel unbootable.

	  If unsure, say N.