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Relicense
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zephray committed Apr 10, 2018
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10 changes: 8 additions & 2 deletions INSTALL.md
Expand Up @@ -19,8 +19,14 @@ Open GameBoy.xise with ISE, double click Generate Programming File.

# Port it to another board

I used two wizard generated Xlinix IP cores in this project, one is the main PLL (module name: pll), another is the 8KB RAM for WRAM and VRAM (module name: blockram8192). I think the PLL only works with Virtex-5 or earilier devices, if you are using a Spartan-6 board, use clock wizard instead. There are also some IP cores instantiated using Xilinx primitives, be sure to change them if you are porting it to an Altera or other vendor's boards. Some memories are implied using reg array, they should work fine with other boards. Boot ROM is also implied using reg array, but I used loadmemh to preload the ROM image file, if it is not supported by your synthesizer, you need to modify that.
I have made the GameBoy module hardware unspecific, meaning that you can simply write your own top-level file and instantiate the GameBoy module in it without changing its inner logic. Some IO's are debug ports which can be ignored, see my top-level file for reference.

The next thing would be porting the actual design. I have made the GameBoy module hardware unspecific, meaning that you can simply write your own top-level file and instantiate the GameBoy module in it without changing its inner logic. Some IO's are debug ports which can be ignored, see my top-level file for reference.
I used two wizard generated Xlinix IP cores in this project, one is the main PLL (module name: pll), another is the 8KB RAM for WRAM and VRAM (module name: blockram8192). The first one is in the top-level file, and it not required by the GameBoy itself.

I think the PLL only works with Virtex-5 and some earilier devices, if you are using a 6-series board, use clock wizard instead. If your board does not have PLL... Please try to provide a 4194304 Hz clock for the Game Boy to work. Video Generation and Sound Generation are all based on this single 4MHz clock, but you probably also need additional clocks for audio codecs and VGA/DVI/HDMI transmitters to work.

Some memories are implemented using reg array, they should work fine with other boards, and they can probably be synthesized into BlockRAMs. Boot ROM is also implemented using reg array, but I used loadmemh to preload the ROM image file, if it is not supported by your synthesizer, you need to modify that.

The audio output is a 20bit number, and the MSB is unused purposely to avoid the problem of the sign. (Audio DACs may use signed number while general purpose DACs usually use unsigned number). The output of the audio should be decoupled with a capacitor as the original GameBoy does.

(To be finished)

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