drivers: hwinfo: implemented hardware info support for Smartbond

Only reset cause is supported as there is no common unique id
present on those chips.
Unique ID can be put in OTP but there is no single specification for this.

Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>

drivers/hwinfo/CMakeLists.txt

@@ -25,5 +25,6 @@ zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM_RSTC    hwinfo_sam_rstc.c)
 zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM         hwinfo_sam.c)
 zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM0        hwinfo_sam0.c)
 zephyr_library_sources_ifdef(CONFIG_HWINFO_SAM4L       hwinfo_sam4l.c)
+zephyr_library_sources_ifdef(CONFIG_HWINFO_SMARTBOND   hwinfo_smartbond.c)
 zephyr_library_sources_ifdef(CONFIG_HWINFO_STM32       hwinfo_stm32.c)
 zephyr_library_sources_ifdef(CONFIG_HWINFO_ANDES       hwinfo_andes.c)

drivers/hwinfo/Kconfig

@@ -150,6 +150,13 @@ config HWINFO_SAM0
 	help
 	  Enable Atmel SAM0 hwinfo driver.
 
+config HWINFO_SMARTBOND
+	bool "Smartbond device reset cause"
+	default y
+	depends on SOC_FAMILY_SMARTBOND
+	help
+	  Enable Smartbond reset cause hwinfo driver.
+
 config HWINFO_ESP32
 	bool "ESP32 device ID"
 	default y

drivers/hwinfo/hwinfo_smartbond.c

@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2023 Jerzy Kasenberg.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/device.h>
+#include <zephyr/drivers/hwinfo.h>
+#include <soc.h>
+
+int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
+{
+	int ret = 0;
+	uint32_t reason = CRG_TOP->RESET_STAT_REG;
+	uint32_t flags = 0;
+
+	/*
+	 * When POR is detected other bits are not valid.
+	 */
+	if (reason & CRG_TOP_RESET_STAT_REG_PORESET_STAT_Msk) {
+		flags = RESET_POR;
+	} else {
+		if (reason & CRG_TOP_RESET_STAT_REG_HWRESET_STAT_Msk) {
+			flags |= RESET_PIN;
+		}
+		if (reason & CRG_TOP_RESET_STAT_REG_SWRESET_STAT_Msk) {
+			flags |= RESET_SOFTWARE;
+		}
+		if (reason & CRG_TOP_RESET_STAT_REG_WDOGRESET_STAT_Msk) {
+			flags |= RESET_WATCHDOG;
+		}
+		if (reason & CRG_TOP_RESET_STAT_REG_CMAC_WDOGRESET_STAT_Msk) {
+			flags |= RESET_WATCHDOG;
+		}
+		if (reason & CRG_TOP_RESET_STAT_REG_SWD_HWRESET_STAT_Msk) {
+			flags |= RESET_DEBUG;
+		}
+	}
+
+	*cause = flags;
+
+	return ret;
+}
+
+int z_impl_hwinfo_clear_reset_cause(void)
+{
+	int ret = 0;
+
+	CRG_TOP->RESET_STAT_REG = 0;
+
+	return ret;
+}
+
+int z_impl_hwinfo_get_supported_reset_cause(uint32_t *supported)
+{
+	*supported = (RESET_PIN
+		| RESET_SOFTWARE
+		| RESET_POR
+		| RESET_WATCHDOG
+		| RESET_DEBUG);
+
+	return 0;
+}