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boards : arm : Add ESPI support for MEC15xx EVB

Expose eSPI block with interrupts enabled for channel 0 & 1
eSPI handshake has been tested using espi driver sample app

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
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Jose Alberto Meza authored and andrewboie committed Jul 25, 2019
1 parent 11d0725 commit 491702a6c603d90b49292aac94248bd3fafa5a69
@@ -21,7 +21,7 @@ config PINMUX_XEC_GPIO000_036
default y

config PINMUX_XEC_GPIO040_076
default n
default y

config PINMUX_XEC_GPIO100_136
default y
@@ -82,4 +82,11 @@ config MCHP_XEC_RTOS_TIMER

endif # SYS_CLOCK_EXISTS

if ESPI

config ESPI_XEC
default y

endif # ESPI

endif # BOARD_MEC15XXEVB_ASSY6853
@@ -38,3 +38,14 @@
status = "okay";
port_sel = <7>;
};

&espi0 {
status = "okay";
reg = <0x400f3800 0x400>;
agg_io_irq = <11>;
agg_vw_irq = <15>;
agg_pc_irq = <7>;
io_girq = <19>;
vw_girq = <24>;
pc_girq = <15>;
};
@@ -24,3 +24,5 @@ CONFIG_GPIO=y

CONFIG_I2C=y
CONFIG_I2C_INIT_PRIORITY=60

CONFIG_ESPI=y
@@ -77,6 +77,22 @@ static int board_pinmux_init(struct device *dev)
pinmux_pin_set(portd, MCHP_GPIO_144, MCHP_GPIO_CTRL_MUX_F1);
#endif

#ifdef CONFIG_ESPI_XEC
mchp_pcr_periph_slp_ctrl(PCR_ESPI, MCHP_PCR_SLEEP_DIS);
/* ESPI RESET */
pinmux_pin_set(portb, MCHP_GPIO_061, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI ALERT */
pinmux_pin_set(portb, MCHP_GPIO_063, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI CS */
pinmux_pin_set(portb, MCHP_GPIO_066, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI CLK */
pinmux_pin_set(portb, MCHP_GPIO_065, MCHP_GPIO_CTRL_MUX_F1);
/* ESPI IO1-4*/
pinmux_pin_set(portb, MCHP_GPIO_070, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_071, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_072, MCHP_GPIO_CTRL_MUX_F1);
pinmux_pin_set(portb, MCHP_GPIO_073, MCHP_GPIO_CTRL_MUX_F1);
#endif
return 0;
}

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