drivers: dma: Introduce driver for NXP's eDMA IP

This commit introduces a driver for NXP's eDMA IP.

The main reasons for introducing a new driver are the following:

	1) The HAL EDMA wrappers don't support well different
	eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
	revision had to be introduced, thus requiring a new Zephyr
	driver.

	2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
	don't use the DMAMUX IP (instead, channel MUX-ing is performed
	through an eDMA register in the case of i.MX93).

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>

drivers/dma/CMakeLists.txt

@@ -39,3 +39,4 @@ zephyr_library_sources_ifdef(CONFIG_DMA_SEDI		dma_sedi.c)
 zephyr_library_sources_ifdef(CONFIG_DMA_SMARTBOND   dma_smartbond.c)
 zephyr_library_sources_ifdef(CONFIG_DMA_NXP_SOF_HOST_DMA dma_nxp_sof_host_dma.c)
 zephyr_library_sources_ifdef(CONFIG_DMA_EMUL	    dma_emul.c)
+zephyr_library_sources_ifdef(CONFIG_DMA_NXP_IMX_EDMA dma_nxp_imx_edma.c)

drivers/dma/Kconfig

@@ -74,4 +74,6 @@ source "drivers/dma/Kconfig.nxp_sof_host_dma"
 
 source "drivers/dma/Kconfig.emul"
 
+source "drivers/dma/Kconfig.nxp_imx_edma"
+
 endif # DMA

drivers/dma/Kconfig.nxp_imx_edma

@@ -0,0 +1,34 @@
+# Copyright 2023 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config DMA_NXP_IMX_EDMA
+	bool "NXP enhanced Direct Memory Access (eDMA) driver for i.MX SoCs"
+	default y
+	depends on DT_HAS_NXP_IMX_EDMA_ENABLED
+	help
+		Enable driver for NXP's eDMA IP.
+
+if DMA_NXP_IMX_EDMA
+
+config DMA_NXP_IMX_EDMA_ALIGN
+	int "Alignment (in bytes) required for the transfers"
+	default 8
+	help
+		Use this to set the alignment (in bytes)
+		used by entities employing this driver to
+		adjust the addresses and sizes of the memory
+		regions involved in the transfer process.
+		This value needs to match one of the possible
+		values for SSIZE and DSIZE, otherwise the
+		driver will return an error upon configuration.
+
+config DMA_NXP_IMX_EDMA_ENABLE_HALFMAJOR_IRQ
+	bool "Set if CPU should be interrupted when CITER = BITER / 2"
+	default n
+	help
+		Enable this configuration if the CPU should be
+		interrupted when CITER = BITER / 2. Using this,
+		the CPU will be interrupted when CITER = BITER and
+		when CITER = BITER / 2.
+
+endif # DMA_NXP_IMX_EDMA