boards: intel_adl: Disable UARTs by default and enabled when needed

Disabled uart0 and uart1 by default in alder_lake.dtsi and enable only for intel_adl_crb board. Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
zephyrproject-rtos · Aug 9, 2023 · 9a140ca · 9a140ca
1 parent d49455a
commit 9a140ca
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Showing 3 changed files with 20 additions and 5 deletions.
diff --git a/boards/x86/intel_adl/intel_adl_crb.dts b/boards/x86/intel_adl/intel_adl_crb.dts
@@ -12,3 +12,11 @@
 		zephyr,shell-uart = &uart0;
 	};
 };
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
diff --git a/boards/x86/intel_adl/intel_adl_rvp.dts b/boards/x86/intel_adl/intel_adl_rvp.dts
@@ -12,7 +12,3 @@
 		zephyr,shell-uart = &uart0_legacy;
 	};
 };
-
-&uart0 {
-	status = "disabled";
-};
diff --git a/dts/x86/intel/alder_lake.dtsi b/dts/x86/intel/alder_lake.dtsi
@@ -65,8 +65,19 @@
 
 			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
 			interrupt-parent = <&intc>;
+			status = "disabled";
+		};
 
-			status = "okay";
+		uart1: uart1 {
+			compatible = "ns16550";
+			vendor-id = <0x8086>;
+			device-id = <0x54A9>;
+			clock-frequency = <1843200>;
+			current-speed = <115200>;
+			reg-shift = <2>;
+			interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LOWEST_LEVEL_LOW 3>;
+			interrupt-parent = <&intc>;
+			status = "disabled";
 		};
 	};