soc: nxp: rw: Support Reset cause setting

Support reset causes on RW SOC Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
zephyrproject-rtos · Mar 19, 2024 · a126b4f · a126b4f
1 parent 8a97c2a
commit a126b4f
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diff --git a/dts/arm/nxp/nxp_rw6xx_common.dtsi b/dts/arm/nxp/nxp_rw6xx_common.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include <dt-bindings/i2c/i2c.h>
+#include <zephyr/dt-bindings/power/nxp_rw_pmu.h>
 
 / {
 	cpus {
@@ -65,6 +66,11 @@
 		#clock-cells = <1>;
 	};
 
+	pmu: pmu@31000 {
+		reg = <0x31000 0x130>;
+		compatible = "nxp,rw-pmu";
+	};
+
 	hsgpio0: hsgpio@0 {
 		compatible = "nxp,lpc-gpio";
 		reg = <0x100000 0x4000>;

diff --git a/soc/nxp/rw/soc.c b/soc/nxp/rw/soc.c
@@ -10,6 +10,7 @@
 #include <zephyr/init.h>
 #include <zephyr/kernel.h>
 #include <zephyr/linker/sections.h>
+#include <zephyr/sys/util_macro.h>
 
 #include <cortex_m/exception.h>
 #include <fsl_power.h>
@@ -213,6 +214,17 @@ __ramfunc void clock_init(void)
 static int nxp_rw600_init(void)
 {
 
+#define PMU_RESET_CAUSES_ \
+	DT_FOREACH_PROP_ELEM_SEP(DT_NODELABEL(pmu), reset_causes_en, DT_PROP_BY_IDX, (|))
+#define PMU_RESET_CAUSES \
+	COND_CODE_0(IS_EMPTY(PMU_RESET_CAUSES_), (PMU_RESET_CAUSES_), (0))
+#define WDT_RESET \
+	COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(wwdt), (kPOWER_ResetSourceWdt), (0))
+#define RESET_CAUSES \
+	(PMU_RESET_CAUSES | WDT_RESET)
+
+	POWER_EnableResetSource(RESET_CAUSES);
+
 	/* Initialize clock */
 	clock_init();