arch: riscv: implement frame-pointer based stack unwinding

Influenced heavily by:
https://lists.denx.de/pipermail/u-boot/2023-May/518216.html

the implementation in x86 and others in Meta.

`CONFIG_RISCV_EXCEPTION_STACK_TRACE` can be enabled by
configuring the following Kconfigs:

```prj.conf
CONFIG_DEBUG_INFO=y
CONFIG_EXCEPTION_STACK_TRACE=y
CONFIG_OVERRIDE_FRAME_POINTER_DEFAULT=y
CONFIG_OMIT_FRAME_POINTER=n
```

qemu_riscv64 output when using an illegal instruction,
timestamp is removed to fit into the column limit:

```log
*** Booting Zephyr OS build zephyr-v3.5.0-3687-gdd23d5b175cf ***
<err> os:
<err> os:  mcause: 2, Illegal instruction
<err> os:   mtval: 7777777
<err> os:      a0: 000000000000000c    t0: 0000000000000000
<err> os:      a1: 0000000010000000    t1: 000000008000f4d0
<err> os:      a2: 000000000000000a    t2: 0000000000000000
<err> os:      a3: 0000000080010e00    t3: 0000000000000000
<err> os:      a4: 0000000000000001    t4: 0000000000000000
<err> os:      a5: 000000008000c3d3    t5: 0000000000000000
<err> os:      a6: 000000008000cd00    t6: 0000000000000000
<err> os:      a7: 0000000080010e28
<err> os:      ra: 0000000080000472
<err> os:    mepc: 0000000080000472
<err> os: mstatus: 0000000a00001880
<err> os:
<err> os: Call Trace begin:
<err> os:       0: fp: 0000000080010e40   ra: 00000000800004a6
<err> os:       1: fp: 0000000080010e60   ra: 00000000800004ca
<err> os:       2: fp: 0000000080010e70   ra: 00000000800054e2
<err> os:       3: fp: 0000000080010e80   ra: 000000008000136a
<err> os: Call Trace end
<err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
<err> os: Current thread: 0x8000eb60 (unknown)
<err> os: Halting system
```

Signed-off-by: Yong Cong Sin <ycsin@meta.com>

arch/riscv/Kconfig

@@ -39,6 +39,14 @@ config RISCV_ALWAYS_SWITCH_THROUGH_ECALL
 	  and most people should say n here to minimize context switching
 	  overhead.
 
+config RISCV_EXCEPTION_STACK_TRACE
+	bool
+	default y
+	depends on OVERRIDE_FRAME_POINTER_DEFAULT && !OMIT_FRAME_POINTER
+	depends on EXCEPTION_STACK_TRACE
+	help
+	  Internal config to enable runtime stack traces on fatal exceptions.
+
 menu "RISCV Processor Options"
 
 config INCLUDE_RESET_VECTOR

arch/riscv/core/fatal.c

@@ -28,6 +28,66 @@ static const struct z_exc_handle exceptions[] = {
  #define NO_REG "                "
 #endif
 
+#ifdef CONFIG_RISCV_EXCEPTION_STACK_TRACE
+#define MAX_STACK_FRAMES 8
+
+static bool in_stack_bound(uintptr_t addr)
+{
+	uintptr_t start, end;
+
+	if (_current == NULL || arch_is_in_isr()) {
+		/* We were servicing an interrupt */
+		int cpu_id;
+
+#ifdef CONFIG_SMP
+		cpu_id = arch_curr_cpu()->id;
+#else
+		cpu_id = 0;
+#endif
+
+		start = (uintptr_t)Z_THREAD_STACK_BUFFER(z_interrupt_stacks[cpu_id]);
+		end = start + CONFIG_ISR_STACK_SIZE;
+#ifdef CONFIG_USERSPACE
+		/* TODO: handle user threads */
+#endif
+	} else {
+		start = _current->stack_info.start;
+		end = Z_STACK_PTR_ALIGN(_current->stack_info.start + _current->stack_info.size);
+	}
+
+	return (addr >= start) && (addr < end);
+}
+
+extern uintptr_t __text_region_start, __text_region_end;
+static inline bool in_text_region(uintptr_t addr)
+{
+	return (addr >= (uintptr_t)&__text_region_start) && (addr < (uintptr_t)&__text_region_end);
+}
+
+static void unwind_stack(const z_arch_esf_t *esf)
+{
+	uintptr_t *fp = (uintptr_t *)esf->s0;
+	uintptr_t ra;
+
+	LOG_ERR("Call Trace begin:");
+
+	for (int i = 0; (i < MAX_STACK_FRAMES) && (fp != NULL) && in_stack_bound((uintptr_t)fp);) {
+		ra = fp[-1];
+		if (in_text_region(ra)) {
+			LOG_ERR("     %2d: fp: " PR_REG "   ra: " PR_REG, i, (uintptr_t)fp, ra);
+			/*
+			 * Increment the iterator only if `ra` is within the text region to get the
+			 * most out of it
+			 */
+			i++;
+		}
+		fp = (uintptr_t *)fp[-2];
+	}
+
+	LOG_ERR("Call Trace end");
+}
+#endif /* CONFIG_RISCV_EXCEPTION_STACK_TRACE */
+
 FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
 				       const z_arch_esf_t *esf)
 {
@@ -54,6 +114,9 @@ FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
 		LOG_ERR("   mepc: " PR_REG, esf->mepc);
 		LOG_ERR("mstatus: " PR_REG, esf->mstatus);
 		LOG_ERR("");
+#ifdef CONFIG_RISCV_EXCEPTION_STACK_TRACE
+		unwind_stack(esf);
+#endif /* CONFIG_RISCV_EXCEPTION_STACK_TRACE */
 	}
 #endif /* CONFIG_EXCEPTION_DEBUG */
 	z_fatal_error(reason, esf);