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bords: renesas: dts: Add overlay files to support LCDC
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In order to avoid defining almost the same overlays for different
sample codes and/or applications a common overlay file per
display interface is defined under the boards dts folder.
In doing so, an application/sample code will only have to
define another overlay explicitly under application's board
folder if more blocks are to be enabled. In either case, users
should explicitly invoke the requested overfiles at 'west build'
invokation by using the DTC_OVERLAY_FILE system variable.

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
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ioannis-karachalios committed Mar 6, 2024
1 parent 39507e3 commit c97a6f4
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63 changes: 63 additions & 0 deletions boards/renesas/da1469x_dk_pro/dts/da1469x_dk_pro_lcdc.overlay
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/*
* Copyright (c) 2023 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/display/panel.h>

/ {
chosen {
zephyr,display = &display;
};

lvgl_pointer {
input = <&display_touch>;
status = "okay";
swap-xy;
};
};

&dma {
status = "okay";
};

&i2c2 {
clock-frequency = <400000>;

display_touch: ft6206@38 {
compatible = "focaltech,ft5336";
status = "okay";
reg = <0x38>;
int-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
};

&display {
disp-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
status = "okay";
width = <480>;
height = <272>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;

/*
* Panel settings for the NHD-4.3-480272EF-ASXP-CTP
* display panel model which integrates the SC7283
* driver IC.
*/
display-timings {
compatible = "zephyr,panel-timing";
hsync-len = <2>;
hfront-porch = <2>;
hback-porch = <3>;
vsync-len = <2>;
vfront-porch = <2>;
vback-porch = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
clock-frequency = <12000000>;
};
};
31 changes: 0 additions & 31 deletions samples/drivers/display/boards/da1469x_dk_pro_mipi_dbi.overlay

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