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MHU: Add MHU driver support for SSE-200 subsystem #12722

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merged 2 commits into from May 15, 2019

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karl-zh
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@karl-zh karl-zh commented Jan 25, 2019

MHU (Message Handling Unit) enable software to raise interrupts to
the processor cores.

This patch enable MHU driver on Musca A which has 2 MHU elements. It helps to communicate between 2 cores.

Signed-off-by: Karl Zhang karl.zhang@linaro.org

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codecov-io commented Jan 25, 2019

Codecov Report

Merging #12722 into master will not change coverage.
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@@           Coverage Diff           @@
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Please look at implementing the IPM interface (include/ipm.h) rather than introducing a new interface.

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galak commented Jan 25, 2019

Please look at implementing the IPM interface (include/ipm.h) rather than introducing a new interface.

Agreed, please use the IPM interface for this driver.

Also, do we need some code and support for bringing up the second core in Zephyr, and running Zephyr on it?

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karl-zh commented Jan 26, 2019

Please look at implementing the IPM interface (include/ipm.h) rather than introducing a new interface.

Agreed, please use the IPM interface for this driver.

Also, do we need some code and support for bringing up the second core in Zephyr, and running Zephyr on it?

Okay, updated to ipm interface. I was thought that the MHU has no data transfer compare to ipm.
Yes, it needs some change to wake up another core on musca, I will have a sample about use MHU on Musca.

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Looks good, I have some comments to the commit message:

Maybe it should start with "drivers/ipm: "?
Shouldn't the word "enables" be here: MHU (Message Handling Unit) enable software
And "It enabled in SSE 200 subsystems." seems to miss "is" perhaps.

#define DEV_DATA(dev) \
((struct ipm_mhu_data *)(dev)->driver_data)
#define IPM_MHU_REGS(dev) \
((volatile struct ipm_mhu_reg_map_t *)(DEV_CFG(dev))->base)
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two spaces between ipm_mhu_reg_map_t and *

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@karl-zh karl-zh Jan 29, 2019

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Thanks for all you corrections, I will update them at next push.

drivers/ipm/ipm_mhu.h Show resolved Hide resolved
help
Driver for SSE 200 MHU (Message Handling Unit)

config IPM_MHU0
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Do we need instance defines, can we get this from DT?

DT_ARM_MHU_0 or DT_ARM_MHU_1

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DT_ARM_MHU_0 and DT_ARM_MHU_1 are always defined after mhu added into dts file, are they?
The config here provide a choice which MHU device should add as in this sub system include 2 MHU.
When enabling MHU device, there will be settings in the prj.conf like:

CONFIG_IPM=y
CONFIG_IPM_MHU=y
CONFIG_IPM_MHU0=y
CONFIG_IPM_MHU1=y

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But that choice of which MHU can and should be handled by whats in the DTS. I don't think we need the Kconfig options here.

#define IPM_MHU_REGS(dev) \
((volatile struct ipm_mhu_reg_map_t *)(DEV_CFG(dev))->base)

#if defined(CONFIG_IPM_MHU0) || defined(CONFIG_IPM_MHU1)
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This ifdef shouldn't be needed.

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CONFIG_IPM=y
CONFIG_IPM_MHU=y
#CONFIG_IPM_MHU0=y
#CONFIG_IPM_MHU1=y

If config file above, there are warnings about some symbols declared but not used. Do we need to consider this scenario?


p_mhu_dev_base = (volatile u32_t *)IPM_MHU_REGS(d);

p_cpu_id = (volatile u32_t *)(((u32_t)p_mhu_dev_base & 0xF0000000) +
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Can we add a #define for the magic number 0xF0000000

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Looks good, some minor review comments in a few places.

samples/subsys/ipc/ipm_mhu_dual_core/README.rst Outdated Show resolved Hide resolved
samples/subsys/ipc/ipm_mhu_dual_core/README.rst Outdated Show resolved Hide resolved
@karl-zh karl-zh force-pushed the MHU_driver branch 2 times, most recently from c291990 to 1a0632c Compare February 11, 2019 09:11
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getting closer on the docs...

samples/subsys/ipc/ipm_mhu_dual_core/README.rst Outdated Show resolved Hide resolved
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karl-zh commented Feb 20, 2019

getting closer on the docs...

Thanks, updated now.

@karl-zh karl-zh closed this Feb 20, 2019
@karl-zh karl-zh reopened this Feb 20, 2019
drivers/ipm/ipm_mhu.c Outdated Show resolved Hide resolved
@galak galak requested a review from ioannisg April 25, 2019 15:59
drivers/ipm/ipm_mhu.c Outdated Show resolved Hide resolved
drivers/ipm/ipm_mhu.c Outdated Show resolved Hide resolved
dts/bindings/mhu/arm,mhu.yaml Show resolved Hide resolved
samples/subsys/ipc/ipm_mhu_dual_core/src/main.c Outdated Show resolved Hide resolved
drivers/ipm/ipm_mhu.c Outdated Show resolved Hide resolved
drivers/ipm/ipm_mhu.c Outdated Show resolved Hide resolved
samples/subsys/ipc/ipm_mhu_dual_core/src/main.c Outdated Show resolved Hide resolved
Karl Zhang added 2 commits May 15, 2019 13:31
MHU (Message Handling Unit) enables software to raise interrupts to
the processor cores. It is enabled in SSE 200 subsystems.

This patch aims to implement inter processor communication.

Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Sample walk through:
    1. CPU 0 will wake up CPU 1 after initialization
    2. CPU 1 will send to CPU 0 an interrupt over MHU0
    3. CPU 0 return the same to CPU 1 when received MHU0 interrupt
    4. Test done when CPU 1 received MHU0 interrupt

The wake up second core and private core ID are soc specific.

Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
@galak galak merged commit d75f3ce into zephyrproject-rtos:master May 15, 2019
@karl-zh karl-zh deleted the MHU_driver branch May 16, 2019 01:06
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7 participants