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Add Renesas H3ULCB board #31307

Merged
merged 16 commits into from Apr 22, 2021
Merged

Add Renesas H3ULCB board #31307

merged 16 commits into from Apr 22, 2021

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julien-massot
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@julien-massot julien-massot commented Jan 14, 2021 •
edited

This pull request adds a very minimal support in order to run Zephyr on the Cortex-r7
present on Renesas H3ULCB board.

H3ULCB have cortex A5x Cores and a 'Realtime processor' based on Cortex-R7.

With this minimal support it is possible to start the hello world, blinky and button demo.
The output is printed on the ram console.

Drivers such as Pinmux, UART, CAN will come later and are already tested in our feature branches
such as 'renesas' branch of https://github.com/iotbzh/zephyr.

This PR create also a renesas_rcar soc family and a 'gen3' soc_series, the different SoCs of the Gen3 series will be
able to reuse this work with just few dts entries and pinmux configuration.

For user which want to talk about Renesas R-Car support within Zephyr, feel free to join the new shiny 'renesas' channel on
Zephyr slack.

@julien-massot julien-massot changed the title Iotbzh/for upstream/add h3ulcb RFC: Iotbzh/for upstream/add h3ulcb Jan 14, 2021
@julien-massot julien-massot changed the title RFC: Iotbzh/for upstream/add h3ulcb RFC: Add Renesas H3ULCB board Jan 14, 2021
@julien-massot julien-massot force-pushed the iotbzh/for-upstream/add-h3ulcb branch 2 times, most recently from 28269f9 to 81246e0 Compare January 15, 2021 06:38
@github-actions github-actions bot added area: API Changes to public APIs area: Devicetree Binding PR modifies or adds a Device Tree binding area: Timer Timer labels Jan 18, 2021
@julien-massot
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Finally I decide to make this PR bigger than the first proposal,
by adding clock control, timer and gpio driver.

Please let us know what is the preferred strategy.

@julien-massot julien-massot force-pushed the iotbzh/for-upstream/add-h3ulcb branch 2 times, most recently from 29f4d47 to 9a70c75 Compare January 19, 2021 15:24
@carlescufi carlescufi requested review from carlocaione and removed request for andrewboie February 2, 2021 13:37
@ioannisg
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ioannisg commented Feb 2, 2021

@stephanosio you might want to take a look as well.

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carlocaione commented Feb 3, 2021 •
edited

Hey @julien-massot a general comment: can you fix the define indentation madness in this patchset? ;)

Also a general question (maybe for @ioannisg @nashif and others) should be the device MMIO API enforced for all the new drivers? Or is that only nice-to-have?

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julien-massot commented Feb 3, 2021 •
edited

Hey @julien-massot a general comment: can you fix the define indentation madness in this patchset? ;)

Hi @carlocaione Indeed I did read this code so much so that I didn't notice anymore that's indentation is odd,
will look at it again.

Thanks for the review.
I'm also interested at any hint which can make the review easier, one way could be to send each driver: timer, gpio and clock alone, and then the SoC support so that each patchset may be easier to handle.

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I'm also interested at any hint which can make the review easier, one way could be to send each driver: timer, gpio and clock alone, and then the SoC support so that each patchset may be easier to handle.

My take on this is (and other devs can have a different opinion on this): the minimum set of things to make the CI happy when testing the pushed code.

So for example I wouldn't push the GPIO driver alone when there is no way for the CI to test the code because there is no soc support for that. So I would push the soc / board enabling code and the minimum set of drivers to make it testable on the CI.

stephanosio
stephanosio reviewed Apr 20, 2021
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Some more comments

drivers/clock_control/clock_control_rcar_cpg_mssr.c Outdated Show resolved Hide resolved
drivers/gpio/gpio_rcar.c Outdated Show resolved Hide resolved
drivers/timer/rcar_cmt_timer.c Outdated Show resolved Hide resolved
drivers/timer/rcar_cmt_timer.c Outdated Show resolved Hide resolved
drivers/timer/rcar_cmt_timer.c Outdated Show resolved Hide resolved
drivers/timer/rcar_cmt_timer.c Outdated Show resolved Hide resolved
drivers/timer/rcar_cmt_timer.c Outdated Show resolved Hide resolved
bbolen
bbolen approved these changes Apr 21, 2021
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Aside from stephanosio's Nit comments, looks good to me.

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Aside from stephanosio's Nit comments, looks good to me.

@julien-massot pls, address those, so we can close the review :)

Julien Massot and others added 16 commits April 22, 2021 07:40
soc: arm: add Renesas rcar_gen3 series support
2567c07 
Most of the Renesas RCar Gen3 based SoC contains a Cortex R7
processor.
This processor has access to the same memory mapped devices than
the Cortex-A5x cores.

- CPU operates upto 800MHz
- Can use ram area from 0x40040000 to 0x42000000
- Has 512 interrupts on GIC-400 compliant with Arm GICv2

Add support for r8a77951 as first SoC of this series which is also
known as H3 ES2.0 and is present present on different boards such as
Salvator and R-Car Starter Kit(H3ulcb).

This first SoC definition is just enough to print Hello World in a
ram console.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
boards: arm: Add support for R-Car H3ULCB board
d302f04 
Add basic configuration for H3ULCB, just enough to see the
Zephyr boot banner on the ram console.

This configuration make use of the Cortex-R7 present on
r8a977951 SoC.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
@aaillet
doc: add documentation for Renesas rcar_h3ulcb board
d59b43b 
Adding ulcb boards documentation based on Renesas official documentation
and following zephyr guideline.

The documentation is describing the board and the current
Zephyr support.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
dts: bindings: clock: add Renesas clock control
0e88dfc 
This add bindings for Renesas CPG, MSSR clock control
driver.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
include: Add Renesas clock control driver
0c03f3e 
DTS bindings file for Renesas RCar CPG clock control.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
drivers: clock_control: add R-Car CPG MSSR driver
afb0d3e 
Clock Pulse Generator, Module Standby Software Reset, are registers
presents in Renesas Gen3 SoC series.

MSSR is used to supply clock to the different modules, shuch as timer,
or UART, it's also possible to issue a reset the different module.

CPG registers allow to get the rate or to set some divider like for
the CAN clock.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
dts: bindings: add binding for Renesas RCar CMT timer
1f397b1 
Add device tree binding for Compare Match Timer that can
be found on various Renesas RCar SoC.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
drivers: timer: add R-Car cmt driver
18f77c1 
Compare Match Timer is a 32 bit compare match timer
that can be found on various Renesas R-Car SoC.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
dts: arm: rcar_gen3_cr7: add cmt timer and clock controller
4d10b00 
The Compare match timer can be found on Renesas
RCar Gen3 soc series.

It depends on clock controller to supply clock to the
CMT module.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
boards: arm: rcar_h3ulcb: add Timer support
43273b0 
Enable CMT timer that can be found on H3ULCB board.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
dts: bindings: gpio: add definition for Renesas RCar gpio
09cc760 
Renesas RCar gpio controller can manage up to 32 gpio
per bank.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
drivers: gpio: add Renesas RCar gpio
feffc15 
Add GPIO controller driver that can be found on Renesas
RCar gen3 soc series.

Controller can handle up to 32 GPIOs per banks.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
dts: arm: rcar: add GPIO banks 5 and 6
445f3ab 
Renesas RCar Gen3 series have up to 8 GPIOs
bank.

Add bank 5 and bank 6, that is used to manage user led and
switches on different demo board.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
boards: arm: rcar_h3ulcb: add led0 and sw0
eebdedf 
Enable the user led and user switch that can be found
on h3ulcb, they are both connected to the GPIO 6 bank.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
test: kernel: context: Add Renesas RCar CMT timer
4d7c877 
This test require explicit definition of the timer irq.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
@aaillet
boards: doc: Update documentation for R-Car H3ULCB
84fe293 
Update supported features for Renesas
R-Car H3ULCB board.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
@ioannisg ioannisg merged commit 38126f9 into zephyrproject-rtos:master Apr 22, 2021
@julien-massot
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Thanks to all people who helped me to find some issues and to apply all the Zephyr code guidelines !

@julien-massot julien-massot deleted the iotbzh/for-upstream/add-h3ulcb branch April 22, 2021 10:08
@julien-massot julien-massot mentioned this pull request Jul 20, 2021
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area: API Changes to public APIs area: ARM ARM (32-bit) Architecture area: Boards area: Devicetree Binding PR modifies or adds a Device Tree binding area: Devicetree area: Documentation area: Timer Timer platform: Renesas Renesas
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