linker: aarch32: automatically enumerate linker memory regions #34537
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
JordanYates
requested review from
ABOSTM,
andyross,
dcpleung,
dleach02,
erwango,
FRASTM,
galak,
ioannisg,
MaureenHelm,
mmahadevan108 and
nashif
as code owners
github-actions
bot
added
area: Boards
area: Devicetree
area: Shields
JordanYates
force-pushed
the
210424_linkable_memory
branch
from
a7769ac
to
1bec31a
Compare
added 3 commits
May 1, 2021 10:24
Adds `DT_COMPAT_FOREACH_STATUS_OKAY`, which has the same behaviour as `DT_INST_FOREACH_STATUS_OKAY`, except that it takes an explicit compatible instead of `DT_DRV_COMPAT`. This allows users to run macros on multiple compatibles without requiring a `#define` `#undef` pair for each one. Reimplements `DT_INST_FOREACH_STATUS_OKAY` in terms of the new macro. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds a macro that automatically generate memory regions for all devicetree nodes with a compatible matching 'linkable-memory'. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Automatically generate memory regions from devicetree compatibles. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
JordanYates
force-pushed
the
210424_linkable_memory
branch
from
1bec31a
to
9ea2025
Compare
added 5 commits
May 1, 2021 11:40
Add the `linkable-memory` compatible to all in-tree definitions of ITCM (Instruction Tighly-Coupled Memory). Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of ITCM regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the `linkable-memory` compatible to all in-tree definitions of DTCM (Data Tighly-Coupled Memory). Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of DTCM regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the `linkable-memory` compatible to all in-tree definitions of CCM (Core Coupled Memory). Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of CCM regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the `linkable-memory` compatible to all in-tree definitions of backup_sram. Remove the manual inclusion of backup_sram regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the `linkable-memory` compatible to stm32wb IPC nodes sram1 and sram2. Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of IPC sram regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the `linkable-memory` compatible to stm32 SDRAM nodes sdram1 and sdram2. Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of these regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
JordanYates
force-pushed
the
210424_linkable_memory
branch
from
9ea2025
to
11dc8a4
Compare
Add the `linkable-memory` compatible to sram3 and sram4 memories. Also adds a label property to ensure that memory region names remain the same. Remove the manual inclusion of these regions in linker.ld, as they are automatically picked up by `DT_LINKABLE_MEMORY_REGIONS()`. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
JordanYates
force-pushed
the
210424_linkable_memory
branch
from
11dc8a4
to
5a278fd
Compare
|
Closing as a new hardcoded compatible is not the best direction. Using existing "mmio-sram" is preferable, but requires other work beforehand. |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Update the aarch32 linker script to automatically generate memory regions for nodes with a new compatible,
linkable-memory.The goal of this PR is to enable the generation of (simple) memory regions purely from devicetree, without having to modify
linker.ld.Based on a good idea here: #34167 (comment)