The S32K3 MCUs are 32-bit Arm Cortex-M7-based microcontrollers with a
focus on automotive and industrial applications. The S32K344 features
a lock-step core, internal flash, RAM and TCM with ECC.

Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Co-authored-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Introduce minimal power initialization for NXP S32 SoCs and allow to
reset the SoC through the sys_reboot() API.

Presently only S32K3 SoCs is supported but it can be extended later to
other NXP S32 SoCs, hence it's placed in a common directory.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

NXP MR-CANHUBK3 is an evaluation board for mobile robotics applications.
It features an NXP S32K344 MCU based on an Arm Cortex-M7 core
(lock-step).

By default, this board configuration uses Lauterbach TRACE32 West runner
for flashing and debugging applications, but other debuggers can be used
to download the program to flash.

Co-authored-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Co-authored-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

The clock controller is a singleton controller for all the system-level
clocks (XOSC, PLL, CGM, etc) to provide run-time information to the
peripheral device drivers about the module's clocks.
Clock configuration is not yet supported.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Enable clock control by default on S32K344 SoCs and add clock
definitions.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Unify the pinctrl_soc.h header for all the NXP S32 family by using
the HAL macros that expose the features supported on specific
devices. This approach still need a different binding for each device to
expose in DT different properties and allowed values.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Support pin control for NXP S32K3 devices and enable it by default on
mr_canhubk3 board configuration.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Add GPIO support for mr_canhubk3 board and enable GPIO tests.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Some NXP S32 devices share common harwdware blocks with other non-S32
devices which are already supported using MCUX-based drivers. In order
to leverage existing support, allow to build with MCUX enabled for NXP
S32 family.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Reuse existing MCUX-based shim driver for LPUART that is compatible with
the hardware block in S32K344. DMA is not yet supported.

Use the board's debug connector (P6 / LPUART2) as default console.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>

Document current support for mr_canhubk3 board.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>