drivers: udc: add initial support for DWC2 device controller #64943
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jfischer-no
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area: Drivers
area: USB
jfischer-no
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nashif,
galak and
MaureenHelm
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zephyrbot
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ABOSTM,
Desvauxm-st,
erwango,
FRASTM,
gautierg-st,
GeorgeCGV and
kartben
|
@erwango this driver should work on STM32 devices that use the Synopsys DWC2 IP. Would it be possible for you to test it on those? Additional reviews would be great. Note: I am aware that there is a dedicated shim driver that supports all STM32 devices, but this DWC2-specific one should work on any ICs using that IP. We are not talking about replacing the existing driver as was suggested in this issue but rather to verify that this driver does work on the relevant STM32 ICs. @sylvioalves this is also true for the ESP32-S3, although the configuration of the IP is unknown to us, so you would need to help out providing the configuration so that you can test the driver. |
We can help to test for sure. What would be nice is to add ready-to-use test configurations on impacted boards which would save us some time and allow at least building (and testing) reproducibility. This hasn't been made for https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/ethernet/eth_dwmac_stm32h7x.c which isn't build or tested (at least in tree) since years maybe.
Sure, I'm getting it. |
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This header is based on drivers/usb/device/usb_dw_registers.h and describes registers of the DWC2 controllers IP and is intended for use in both device controller drivers and a host controller driver. The difference to usb_dw_registers.h is that this header does not confuse offsets with bit positions, contains all the definitions required for device mode, has register and bit field names identical to the databook and no annoying underscores. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use new common header and remove usb_dw_registers.h. No functional changes, only renaming of registers and field identifiers. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The driver currently supports only dedicated FIFO mode (with dynfifosizing if enabled). Control, bulk and interrupt transfers are supported, isochronous transfers are not yet supported. The driver accesses controller registers using sys_io.h, but for debugging purposes one can get a register map from the driver's config, similar to the usb_dc_dw.c driver. Initial support also has vendor quirks for the STM32F4 SoC family. Tested on NUCLEO-F413HG. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add DT overlay to be able to support and test UDC DWC2 driver (snps,dwc2) on nucleo_f413zh board. This disables STM32 shim driver described and configured on the SoC and board level. Obviously,it should work with other STM32F4 boards as well and we could have a mechanism to apply it generically using snippets. Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
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Add common DWC2 register header initial device support (UDC API) for DWC2 controller.