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drivers: bluetooth: Add Ambiq HCI driver for Apollo4 Blue Plus #66227

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merged 3 commits into from Dec 18, 2023
Merged

drivers: bluetooth: Add Ambiq HCI driver for Apollo4 Blue Plus #66227

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5519c5b
drivers: bluetooth: Add Ambiq HCI driver for Apollo4 Blue Plus.
aaronyegx Dec 13, 2023
b7e988b
boards: arm: apollo4p_blue_kxr_evb: Enable BT HCI.
aaronyegx Dec 6, 2023
b9ffe32
west.yml: hal_ambiq: Add Bluetooth support.
aaronyegx Dec 13, 2023
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31 changes: 31 additions & 0 deletions boards/arm/apollo4p_blue_kxr_evb/Kconfig.defconfig
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Expand Up @@ -5,3 +5,34 @@
config BOARD
default "apollo4p_blue_kxr_evb"
depends on BOARD_APOLLO4P_BLUE_KXR_EVB

if BT

config MAIN_STACK_SIZE
default 2048

choice BT_HCI_BUS_TYPE
default BT_AMBIQ_HCI
endchoice

config BT_BUF_ACL_TX_COUNT
default 14

config BT_BUF_CMD_TX_SIZE
default 255

config BT_BUF_EVT_RX_SIZE
default 255

config BT_BUF_ACL_TX_SIZE
default 251

config BT_BUF_ACL_RX_SIZE
default 251

# L2CAP SDU/PDU TX MTU
# BT_L2CAP_RX_MTU = CONFIG_BT_BUF_ACL_RX_SIZE - BT_L2CAP_HDR_SIZE
config BT_L2CAP_TX_MTU
default 247

endif # BT
17 changes: 17 additions & 0 deletions boards/arm/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts
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Expand Up @@ -86,6 +86,23 @@
status = "okay";
};

&iom4 {
compatible = "ambiq,spi";
pinctrl-0 = <&spi4_default>;
pinctrl-names = "default";
cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";

bt-hci@0 {
compatible = "ambiq,bt-hci-spi";
reg = <0>;
irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
};
};
Comment on lines +89 to +104
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Are these wired internally in the chip? If that's the case I think it would make sense to have the nodes declared in ambiq_apollo4p_blue.dtsi so that you don't have to redefine the same things on every board using the chip, it's not like you can change it anyway. See stm32wl.dtsi with the stm32wl-subghz-radio node in the internal spi for example.

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@fabiobaltieri thanks for your following. Will have an independent PR to optimize this.


&mspi0 {
pinctrl-0 = <&mspi0_default>;
pinctrl-names = "default";
Expand Down
1 change: 1 addition & 0 deletions drivers/bluetooth/hci/CMakeLists.txt
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Expand Up @@ -25,3 +25,4 @@ zephyr_library_sources_ifdef(CONFIG_BT_USERCHAN userchan.c)
zephyr_library_sources_ifdef(CONFIG_BT_SILABS_HCI slz_hci.c)
zephyr_library_sources_ifdef(CONFIG_BT_PSOC6_BLESS hci_psoc6_bless.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUAPP nrf53_support.c)
zephyr_library_sources_ifdef(CONFIG_BT_AMBIQ_HCI hci_ambiq.c apollox_blue.c)
23 changes: 22 additions & 1 deletion drivers/bluetooth/hci/Kconfig
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Expand Up @@ -110,6 +110,16 @@ config BT_NO_DRIVER
This is intended for unit tests where no internal driver
should be selected.

config BT_AMBIQ_HCI
bool "AMBIQ BT HCI driver"
select SPI
select GPIO
select CLOCK_CONTROL
select BT_HCI_SETUP
help
Supports Ambiq Bluetooth SoC using SPI as the communication protocol.
HCI packets are sent and received as single Byte transfers.

endchoice

if BT_SPI
Expand All @@ -133,6 +143,17 @@ config BT_SPI_BLUENRG

endif # BT_SPI

if BT_AMBIQ_HCI

config BT_HCI_INIT_PRIORITY
int "BT HCI init priority"
default 75
help
The priority of BT HCI driver initialization needs to be lower than
the SPI, GPIO, clock controller drivers initialization priorities.

endif # BT_AMBIQ_HCI

config BT_STM32_IPM_RX_STACK_SIZE
int "STM32 IPM stack size for RX thread"
depends on BT_STM32_IPM
Expand Down Expand Up @@ -196,7 +217,7 @@ config BT_DRV_TX_STACK_SIZE

config BT_DRV_RX_STACK_SIZE
int
default 640 if BT_SPI
default 640 if (BT_SPI || BT_AMBIQ_HCI)
default BT_RX_STACK_SIZE if (BT_H4 || BT_HCI_RAW_H4)
default BT_STM32_IPM_RX_STACK_SIZE if BT_STM32_IPM
default 256
Expand Down