drivers:intc_plic: fix plic PLIC_TRIG_LEVEL define mistake #67301
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fkokosinski
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Could you take a look at this as well @ycsin? |
Interrupt trigger type register each bit indicate the configured interrupt type. bit value is 0 indicate level trigger interrupt, 1 indicate edge trigger interrupt. The level trigger defined to ~BIT(0) equal 0xfffffffe not equal 0. Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
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Describe the bug
RISCV interrupt-controller PLIC driver each interrupt can entry once,
because in drivers/interrupt-controller/intc_plic.c Due to PLIC_TRIG_LEVEL define mistake case that in function plic_irq_handler no clean the claim register, the interrupt always in pending.
Reason
when compile c file, the BIT(n) is
#define BIT(n) (1UL << (n)the PLIC_TRIG_LEVEL is defined to
((uint32_t)~BIT(0))it equal to 0xfffffffe, not 0it will not clean the claim register, and I have printf the PLIC_TRIG_LEVEL, it equal 0xfffffffe.
Additional context
In nceplic100 pdf:
http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf
Page 277 say:
These registers are read-only and indicate the configured interrupt trigger type of interrupt sources.
Every interrupt source occupies 1 bit. There are a total of 32 registers, each 32-bit wide, for 1023
interrupt sources. The location of the interrupt trigger type bit for interrupt source n (1 ≤ n ≤ 1023)
can be determined by the following equations