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[bot] AutoMerging: merge all upstream's changes:
* https://github.com/coolsnowwolf/lede: arm-trusted-firmware-sunxi: Use common trusted-firmware-a.mk (coolsnowwolf#10804) kernel: bump to 5.4.230, 5.10.165, 5.15.90 (coolsnowwolf#10803) kernel: bump 6.1 to 6.1.8 (coolsnowwolf#10802) layerscape: sync with official source (coolsnowwolf#10801) rockchip: add support for Ariaboard Photonicat rfkill: enable for rockchip by default
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LINUX_VERSION-5.10 = .164 | ||
LINUX_KERNEL_HASH-5.10.164 = 0c7eaaa87b012c6662440f4ce2ea6e1bb961c1845cafd102eab08a57efeb8278 | ||
LINUX_VERSION-5.10 = .165 | ||
LINUX_KERNEL_HASH-5.10.165 = 971defc48f19ed0a2a7ffd4b48234619cac28895c985c6d747f5b707ba47af0d |
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LINUX_VERSION-5.15 = .89 | ||
LINUX_KERNEL_HASH-5.15.89 = e7311b874e014bb6d37c051319bd6a4a4e3d05a1c32546522deabbfd2d752fe8 | ||
LINUX_VERSION-5.15 = .90 | ||
LINUX_KERNEL_HASH-5.15.90 = e6fd430022686753af7516fe7544f96aab379509dc5b7829017bdcd92b393b42 |
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LINUX_VERSION-5.4 = .229 | ||
LINUX_KERNEL_HASH-5.4.229 = c5c592071195efef62082febe10efe6c793412670dfce89e476383d0493fa7af | ||
LINUX_VERSION-5.4 = .230 | ||
LINUX_KERNEL_HASH-5.4.230 = a74fd32ccc1025b72f3ba7183208761f7c6190fb96e8f484f6d543a5a183e62f |
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LINUX_VERSION-6.1 = .7 | ||
LINUX_KERNEL_HASH-6.1.7 = 4ab048bad2e7380d3b827f1fad5ad2d2fc4f2e80e1c604d85d1f8781debe600f | ||
LINUX_VERSION-6.1 = .8 | ||
LINUX_KERNEL_HASH-6.1.8 = b60bb53ab8ba370a270454b11e93d41af29126fc72bd6ede517673e2e57b816d |
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208 changes: 208 additions & 0 deletions
208
package/boot/uboot-rockchip/patches/314-rockchip-rk3568-Add-support-for-photonicat.patch
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--- a/arch/arm/dts/Makefile | ||
+++ b/arch/arm/dts/Makefile | ||
@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ | ||
rk3568-opc-h68k.dtb \ | ||
rk3568-mrkaio-m68s.dtb \ | ||
rk3568-nanopi-r5s.dtb \ | ||
+ rk3568-photonicat.dtb \ | ||
rk3566-quartz64-a.dtb \ | ||
rk3568-rock-3a.dtb \ | ||
rk3568-rock-pi-e25.dtb | ||
--- /dev/null | ||
+++ b/arch/arm/dts/rk3568-photonicat-u-boot.dtsi | ||
@@ -0,0 +1,33 @@ | ||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
+ | ||
+#include "rk3568-u-boot.dtsi" | ||
+ | ||
+/ { | ||
+ chosen { | ||
+ stdout-path = &uart2; | ||
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; | ||
+ }; | ||
+}; | ||
+ | ||
+&gpio0 { | ||
+ u-boot,dm-spl; | ||
+}; | ||
+ | ||
+&pinctrl { | ||
+ u-boot,dm-spl; | ||
+}; | ||
+ | ||
+&sdmmc0 { | ||
+ bus-width = <4>; | ||
+ u-boot,spl-fifo-mode; | ||
+}; | ||
+ | ||
+&uart2 { | ||
+ u-boot,dm-spl; | ||
+ clock-frequency = <24000000>; | ||
+ status = "okay"; | ||
+}; | ||
+ | ||
+&vcc3v3_sd { | ||
+ u-boot,dm-spl; | ||
+}; | ||
--- /dev/null | ||
+++ b/arch/arm/dts/rk3568-photonicat.dts | ||
@@ -0,0 +1,54 @@ | ||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
+ | ||
+/dts-v1/; | ||
+#include <dt-bindings/gpio/gpio.h> | ||
+#include <dt-bindings/pinctrl/rockchip.h> | ||
+#include "rk3568.dtsi" | ||
+ | ||
+/ { | ||
+ model = "Ariaboard Photonicat"; | ||
+ compatible = "ariaboard,photonicat", "rockchip,rk3568"; | ||
+ | ||
+ chosen: chosen { | ||
+ stdout-path = "serial2:1500000n8"; | ||
+ }; | ||
+ | ||
+ vcc3v3_sd: vcc3v3_sd { | ||
+ compatible = "regulator-fixed"; | ||
+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; | ||
+ pinctrl-names = "default"; | ||
+ pinctrl-0 = <&vcc_sd_h>; | ||
+ regulator-boot-on; | ||
+ regulator-name = "vcc3v3_sd"; | ||
+ regulator-min-microvolt = <3300000>; | ||
+ regulator-max-microvolt = <3300000>; | ||
+ }; | ||
+}; | ||
+ | ||
+&pinctrl { | ||
+ vcc_sd { | ||
+ vcc_sd_h: vcc-sd-h { | ||
+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; | ||
+ }; | ||
+ }; | ||
+}; | ||
+ | ||
+&sdhci { | ||
+ bus-width = <8>; | ||
+ max-frequency = <200000000>; | ||
+ non-removable; | ||
+ status = "okay"; | ||
+}; | ||
+ | ||
+&sdmmc0 { | ||
+ max-frequency = <52000000>; | ||
+ status = "okay"; | ||
+}; | ||
+ | ||
+&sdmmc1 { | ||
+ status = "okay"; | ||
+}; | ||
+ | ||
+&uart2 { | ||
+ status = "okay"; | ||
+}; | ||
--- /dev/null | ||
+++ b/configs/photonicat-rk3568_defconfig | ||
@@ -0,0 +1,101 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_SYS_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-photonicat" | ||
+CONFIG_ROCKCHIP_RK3568=y | ||
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_GPIO=y | ||
+CONFIG_SPL_MMC=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_TARGET_EVB_RK3568=y | ||
+CONFIG_DEBUG_UART_BASE=0xFE660000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_API=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_OF_SYSTEM_SETUP=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-photonicat.dtb" | ||
+# CONFIG_SYS_DEVICE_NULLDEV is not set | ||
+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_SEPARATE_BSS=y | ||
+CONFIG_SPL_ADC=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_SPL_BOARD_INIT=y | ||
+CONFIG_CMD_ADC=y | ||
+CONFIG_CMD_BIND=y | ||
+CONFIG_CMD_CLK=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_I2C=y | ||
+CONFIG_CMD_MMC=y | ||
+CONFIG_CMD_USB=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+CONFIG_CMD_PMIC=y | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_NET_RANDOM_ETHADDR=y | ||
+CONFIG_SPL_DM_WARN=y | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_ROCKCHIP_GPIO_V2=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_MMC_IO_VOLTAGE=y | ||
+CONFIG_SPL_MMC_IO_VOLTAGE=y | ||
+CONFIG_MMC_HS200_SUPPORT=y | ||
+CONFIG_SPL_MMC_HS200_SUPPORT=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_DM_ETH=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_POWER_DOMAIN=y | ||
+CONFIG_DM_PMIC=y | ||
+CONFIG_PMIC_RK8XX=y | ||
+CONFIG_SPL_PMIC_RK8XX=y | ||
+CONFIG_REGULATOR_PWM=y | ||
+CONFIG_DM_REGULATOR_FIXED=y | ||
+CONFIG_SPL_DM_REGULATOR_FIXED=y | ||
+CONFIG_DM_REGULATOR_GPIO=y | ||
+CONFIG_REGULATOR_RK8XX=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_DM_RESET=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_USB=y | ||
+CONFIG_USB_XHCI_HCD=y | ||
+CONFIG_USB_XHCI_DWC3=y | ||
+CONFIG_USB_EHCI_HCD=y | ||
+CONFIG_USB_EHCI_GENERIC=y | ||
+CONFIG_USB_OHCI_HCD=y | ||
+CONFIG_USB_OHCI_GENERIC=y | ||
+CONFIG_USB_DWC3=y | ||
+CONFIG_USB_DWC3_GENERIC=y | ||
+CONFIG_ROCKCHIP_USB2_PHY=y | ||
+CONFIG_USB_KEYBOARD=y | ||
+CONFIG_USB_HOST_ETHER=y | ||
+CONFIG_USB_ETHER_LAN75XX=y | ||
+CONFIG_USB_ETHER_LAN78XX=y | ||
+CONFIG_USB_ETHER_SMSC95XX=y | ||
+CONFIG_ERRNO_STR=y |
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