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flaky freebsd CI ReleaseSafe std lib tests #7105

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andrewrk opened this issue Nov 14, 2020 · 2 comments
Open

flaky freebsd CI ReleaseSafe std lib tests #7105

andrewrk opened this issue Nov 14, 2020 · 2 comments
Labels
bug Observed behavior contradicts documented or intended behavior os-freebsd
Milestone
0.15.0

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@andrewrk
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andrewrk commented Nov 14, 2020 •
edited

2 examples:

The following command terminated unexpectedly:
/usr/home/build/zig/build/release/bin/zig test /usr/home/build/zig/lib/std/std.zig --test-name-prefix std-native-ReleaseSafe--multi  -OReleaseSafe --cache-dir /usr/home/build/zig/zig-cache --name test -I /usr/home/build/zig/test --override-lib-dir /usr/home/build/zig/lib 
error: the following build command failed with exit code 1:
/usr/home/build/zig/zig-cache/o/ad5b910374f8785e224393cacae965e7/build /usr/home/build/zig/build/release/bin/zig /usr/home/build/zig /usr/home/build/zig/zig-cache test -Dskip-compile-errors -Dskip-non-native

The following command terminated unexpectedly:
/usr/home/build/zig/build/release/bin/zig test /usr/home/build/zig/lib/std/std.zig --test-name-prefix std-native-ReleaseSafe--multi  -OReleaseSafe --cache-dir /usr/home/build/zig/zig-cache --name test -I /usr/home/build/zig/test --override-lib-dir /usr/home/build/zig/lib 
error: the following build command failed with exit code 1:
/usr/home/build/zig/zig-cache/o/0e5c0af2fa0abbdcb60341b32b905d91/build /usr/home/build/zig/build/release/bin/zig /usr/home/build/zig /usr/home/build/zig/zig-cache test -Dskip-compile-errors -Dskip-non-native

Appears to be the ReleaseSafe std lib tests.

One of the first things to check when a release build is failing is to run it with a debug build of LLVM, which has assertions enabled, and see if that catches anything.
@andrewrk andrewrk added bug Observed behavior contradicts documented or intended behavior os-freebsd labels Nov 14, 2020
@andrewrk andrewrk added this to the 0.7.1 milestone Nov 14, 2020
@andrewrk andrewrk changed the title flaky freebsd CI test flaky freebsd CI ReleaseSafe std lib tests Nov 14, 2020
@andrewrk
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andrewrk commented Dec 1, 2020

Not gonna hold up the 0.7.1 release for this.

@andrewrk andrewrk modified the milestones: 0.7.1, 0.9.0 Dec 1, 2020
@andrewrk andrewrk modified the milestones: 0.9.0, 0.10.0 May 19, 2021
@mikdusan
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mikdusan commented Jan 7, 2023 •
edited

  • here's a run on freebsd, reducing the first LLVM assert (there's probably more)
  • note that the zig build test docs ... WITHOUT LLVM ASSERT-MODE does not seem flakey for me
  • and with assertions zig build test docs ... still passes for me
  • nonetheless we should probably go through the exercise of LLVM assert mode on the *BSD platforms as well as tier-1

my test env:

$ uname -a
FreeBSD freebsd131-amd64 13.1-RELEASE FreeBSD 13.1-RELEASE releng/13.1-n250148-fc952ac2212 GENERIC amd64

$ zig version
0.11.0-dev.1247+87b223428
PASS: zig build test docs ... 
$ /opt/llvm-freebsd13.1-amd64-15.0.6-release/bin/llvm-config --build-mode --assertion-mode
Release
OFF

$ zig build test docs -Dstatic-llvm --search-prefix /opt/llvm-freebsd13.1-amd64-15.0.6-release --zig-lib-dir lib -Dskip-non-native
PASS: zig build test docs ... (LLVM assertions enabled) 
$ /opt/llvm-freebsd13.1-amd64-15.0.6-release-assert/bin/llvm-config --build-mode --assertion-mode
Release
ON

$ zig build test docs -Dstatic-llvm --search-prefix /opt/llvm-freebsd13.1-amd64-15.0.6-release-assert --zig-lib-dir lib -Dskip-non-native

[note: LLVM expensive-checks are probably a step-too-far]

FAIL: zig build test docs ...(LLVM assertions and expensive-checks enabled) 
$ /opt/llvm-freebsd13.1-amd64-15.0.6-release-assertx/bin/llvm-config --build-mode --assertion-mode
Release
ON

$ zig build test docs -Dstatic-llvm --search-prefix /opt/llvm-freebsd13.1-amd64-15.0.6-release-assertx --zig-lib-dir lib -Dskip-non-native
Test [1/113] test_0... compiler [1/1191] adding_numbers_at_runtime_and_comptime (stage2, x86_64-linux) [1/3] update [2/... LLVM Emit Object...
# After Greedy Register Allocator
********** INTERVALS **********
AH EMPTY
AL EMPTY
CH EMPTY
CL [704r,736r:1)[1248r,1280r:0) 0@1248r 1@704r
DH EMPTY
DL EMPTY
HAX EMPTY
HCX EMPTY
HDX EMPTY
EFLAGS [32r,32d:23)[80r,80d:22)[128r,128d:19)[176r,176d:18)[224r,256r:17)[272r,288r:16)[400r,400d:21)[448r,464r:15)[544r,560r:14)[624r,624d:20)[656r,656d:11)[736r,736d:10)[752r,784r:9)[880e,880d:13)[896r,896d:0)[912r,928r:12)[1104e,1104d:8)[1120r,1120d:7)[1136r,1168r:6)[1280r,1280d:4)[1288r,1288d:5)[1312r,1312d:3)[1392r,1392d:2)[1440r,1440d:1) 0@896r 1@1440r 2@1392r 3@1312r 4@1280r 5@1288r 6@1136r 7@1120r 8@1104e 9@752r 10@736r 11@656r 12@912r 13@880e 14@544r 15@448r 16@272r 17@224r 18@176r 19@128r 20@624r 21@400r 22@80r 23@32r
SIL EMPTY
SIH EMPTY
HSI EMPTY
XMM0 [0B,16r:0)[48r,64r:7)[64r,96r:6)[144r,160r:5)[160r,192r:4)[1408r,1424r:3)[1424r,1456r:2)[1472r,1488r:1) 0@0B-phi 1@1472r 2@1424r 3@1408r 4@160r 5@144r 6@64r 7@48r
XMM1 EMPTY
XMM2 EMPTY
XMM3 EMPTY
XMM4 EMPTY
XMM5 EMPTY
XMM6 EMPTY
XMM7 EMPTY
XMM8 EMPTY
XMM9 EMPTY
XMM10 EMPTY
XMM11 EMPTY
XMM12 EMPTY
XMM13 EMPTY
XMM14 EMPTY
XMM15 EMPTY
%1 [368r,480B:0)[528B,912r:0)[1040B,1288r:0) 0@368r  weight:2.004585e-03
%2 [432r,480B:0)[528B,544r:0) 0@432r  weight:4.268087e-03
%5 [688r,736r:0)[736r,816B:1)[1040B,1168r:1)[1168r,1288r:2)[1288r,1312r:3) 0@688r 1@736r 2@1168r 3@1288r  weight:2.156863e-03
%9 [16r,144r:0) 0@16r  weight:5.738636e-03
%11 [384r,400r:0)[400r,480B:1)[528B,624r:1)[624r,656r:2)[656r,816B:3)[1040B,1248r:3) 0@384r 1@400r 2@624r 3@656r  weight:4.391999e-03
%13 [192r,224r:0) 0@192r  weight:4.675926e-03
%14 [208r,224r:0) 0@208r  weight:INF
%15 [240r,272r:0) 0@240r  weight:4.629630e-03
%16 [256r,272r:0) 0@256r  weight:INF
%22 [896r,928r:0)[928r,992r:1) 0@896r 1@928r  weight:1.897533e-03
%26 [1120r,1168r:0) 0@1120r  weight:3.501401e-04
%32 [1232r,1280r:2)[1280r,1312r:0)[1312r,1328r:1) 0@1280r 1@1312r 2@1232r  weight:1.897533e-03
%33 [1456r,1472r:0) 0@1456r  weight:INF
%35 [96r,848r:0)[848r,864r:4)[992r,1040B:1)[1040B,1072r:0)[1072r,1088r:5)[1328r,1360B:2)[1360B,1408r:3) 0@96r 1@992r 2@1328r 3@1360B-phi 4@848r 5@1072r  weight:3.241714e-03
%37 [328r,352B:0)[456r,848r:1)[848r,864r:2)[992r,1040B:3)[1040B,1072r:1)[1072r,1088r:4)[1328r,1360B:5)[1360B,1408r:6) 0@328r 1@456r 2@848r 3@992r 4@1072r 5@1328r 6@1360B-phi  weight:3.563131e-03
%38 [96r,328r:0)[352B,456r:0) 0@96r  weight:3.730007e-03
%39 EMPTY  weight:3.115570e-03
%40 [360r,456r:0) 0@360r  weight:4.551708e-03
%41 EMPTY  weight:4.139344e-03
%42 [16r,48r:0) 0@16r  weight:6.886363e-03
RegMasks: 64r 160r 1424r
********** MACHINEINSTRS **********
# Machine code for function __ceilh: NoPHIs, TracksLiveness, TiedOpsRewritten, TracksDebugUserValues
Frame Objects:
  fi#0: size=4, align=4, at location [SP+8]
  fi#1: size=4, align=4, at location [SP+8]
  fi#2: size=4, align=4, at location [SP+8]
  fi#3: size=4, align=2, at location [SP+8]
Constant Pool:
  cp#0: 0x4770000000000000, align=4
  cp#1: [float -0.000000e+00, float 1.000000e+00], align=4
Function Live Ins: $xmm0 in %9

0B	bb.0.Entry:
	  successors: %bb.7(0x20000000), %bb.1(0x60000000); %bb.7(25.00%), %bb.1(75.00%)
	  liveins: $xmm0
16B	  %42:fr16 = COPY $xmm0
24B	  MOVSSmr %stack.3, 1, $noreg, 0, $noreg, %42:fr16 :: (store (s32) into %stack.3, align 2)
32B	  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
48B	  $xmm0 = COPY %42:fr16
64B	  CALL64pcrel32 target-flags(x86-plt) &__extendhfsf2, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0
80B	  ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
96B	  MOVSSmr %stack.2, 1, $noreg, 0, $noreg, $xmm0 :: (store (s32) into %stack.2)
128B	  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
144B	  $xmm0 = MOVSSrm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3, align 2)
160B	  CALL64pcrel32 target-flags(x86-plt) &__extendhfsf2, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0
176B	  ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
192B	  %13:fr32 = COPY $xmm0
208B	  %14:fr32 = FsFLD0SS
224B	  nofpexcept UCOMISSrr %13:fr32, %14:fr32, implicit-def $eflags, implicit $mxcsr
240B	  %15:gr8 = SETCCr 11, implicit $eflags
256B	  %16:gr8 = SETCCr 4, implicit $eflags
272B	  TEST8rr %16:gr8, %15:gr8, implicit-def $eflags
288B	  JCC_1 %bb.1, 4, implicit $eflags

304B	bb.7:
	; predecessors: %bb.0
	  successors: %bb.6(0x80000000); %bb.6(100.00%)

328B	  %37:fr32 = MOVSSrm_alt %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2)
336B	  JMP_1 %bb.6

352B	bb.1.Entry:
	; predecessors: %bb.0
	  successors: %bb.8(0x2aaaaaab), %bb.2(0x55555555); %bb.8(33.33%), %bb.2(66.67%)

360B	  %40:fr32 = MOVSSrm_alt %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2)
368B	  %1:gr32 = MOVSS2DIrr %40:fr32
384B	  %11:gr32 = COPY %1:gr32
400B	  %11:gr32 = SHR32ri %11:gr32(tied-def 0), 23, implicit-def dead $eflags
432B	  %2:gr32 = MOVZX32rr8 %11.sub_8bit:gr32
448B	  CMP32ri %2:gr32, 149, implicit-def $eflags
456B	  %37:fr32 = COPY %40:fr32
464B	  JCC_1 %bb.2, 6, implicit $eflags

480B	bb.8:
	; predecessors: %bb.1
	  successors: %bb.6(0x80000000); %bb.6(100.00%)

512B	  JMP_1 %bb.6

528B	bb.2.Else2.i:
	; predecessors: %bb.1
	  successors: %bb.3(0x40000000), %bb.4(0x40000000); %bb.3(50.00%), %bb.4(50.00%)

544B	  CMP32ri8 %2:gr32, 127, implicit-def $eflags
560B	  JCC_1 %bb.4, 2, implicit $eflags
576B	  JMP_1 %bb.3

592B	bb.3.Then3.i:
	; predecessors: %bb.2
	  successors: %bb.6(0x30000000), %bb.5(0x50000000); %bb.6(37.50%), %bb.5(62.50%)

624B	  %11:gr32 = nuw nsw ADD32ri8 %11:gr32(tied-def 0), 1, implicit-def dead $eflags
656B	  %11:gr32 = AND32ri8 %11:gr32(tied-def 0), 31, implicit-def dead $eflags
688B	  %5:gr32 = MOV32ri 8388607
704B	  $cl = COPY %11.sub_8bit:gr32
736B	  %5:gr32 = SHR32rCL %5:gr32(tied-def 0), implicit-def dead $eflags, implicit $cl
752B	  TEST32rr %5:gr32, %1:gr32, implicit-def $eflags
784B	  JCC_1 %bb.6, 4, implicit $eflags
800B	  JMP_1 %bb.5

816B	bb.4.Else4.i:
	; predecessors: %bb.2
	  successors: %bb.6(0x80000000); %bb.6(100.00%)

848B	  %37:fr32 = nofpexcept ADDSSrm %37:fr32(tied-def 0), $rip, 1, $noreg, %const.0, $noreg, implicit $mxcsr :: (load (s32) from constant-pool)
864B	  MOVSSmr %stack.0, 1, $noreg, 0, $noreg, %37:fr32 :: (store (s32) into %stack.0)
880B	  INLINEASM &"" [sideeffect] [mayload] [attdialect], $0:[mem:m], %stack.0, 1, $noreg, 0, $noreg, $1:[clobber], implicit-def dead early-clobber $df, $2:[clobber], implicit-def early-clobber $fpsw, $3:[clobber], implicit-def dead early-clobber $eflags
896B	  undef %22.sub_32bit:gr64_nosp = MOV32r0 implicit-def dead $eflags
912B	  TEST32rr %1:gr32, %1:gr32, implicit-def $eflags
928B	  %22.sub_8bit:gr64_nosp = SETCCr 9, implicit $eflags
992B	  %37:fr32 = MOVSSrm_alt $noreg, 4, %22:gr64_nosp, %const.1, $noreg :: (load (s32) from constant-pool)
1024B	  JMP_1 %bb.6

1040B	bb.5.Block7.i:
	; predecessors: %bb.3
	  successors: %bb.6(0x80000000); %bb.6(100.00%)

1072B	  %37:fr32 = nofpexcept ADDSSrm %37:fr32(tied-def 0), $rip, 1, $noreg, %const.0, $noreg, implicit $mxcsr :: (load (s32) from constant-pool)
1088B	  MOVSSmr %stack.1, 1, $noreg, 0, $noreg, %37:fr32 :: (store (s32) into %stack.1)
1104B	  INLINEASM &"" [sideeffect] [mayload] [attdialect], $0:[mem:m], %stack.1, 1, $noreg, 0, $noreg, $1:[clobber], implicit-def dead early-clobber $df, $2:[clobber], implicit-def early-clobber $fpsw, $3:[clobber], implicit-def dead early-clobber $eflags
1120B	  %26:gr32 = MOV32r0 implicit-def dead $eflags
1136B	  TEST32rr %1:gr32, %1:gr32, implicit-def $eflags
1168B	  %5:gr32 = CMOV32rr %5:gr32(tied-def 0), %26:gr32, 8, implicit $eflags
1232B	  %32:gr32 = MOV32ri -8388608
1248B	  $cl = COPY %11.sub_8bit:gr32
1280B	  %32:gr32 = SAR32rCL %32:gr32(tied-def 0), implicit-def dead $eflags, implicit $cl
1288B	  %5:gr32 = nuw ADD32rr %5:gr32(tied-def 0), %1:gr32, implicit-def dead $eflags
1312B	  %32:gr32 = AND32rr %32:gr32(tied-def 0), %5:gr32, implicit-def dead $eflags
1328B	  %37:fr32 = MOVDI2SSrr %32:gr32

1360B	bb.6.ceilf.exit:
	; predecessors: %bb.4, %bb.3, %bb.5, %bb.7, %bb.8

1392B	  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
1408B	  $xmm0 = COPY %37:fr32
1424B	  CALL64pcrel32 target-flags(x86-plt) &__truncsfhf2, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $xmm0, implicit-def $rsp, implicit-def $ssp, implicit-def $xmm0
1440B	  ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
1456B	  %33:fr16 = COPY $xmm0
1472B	  $xmm0 = COPY %33:fr16
1488B	  RET 0, $xmm0

# End machine code for function __ceilh.

*** Bad machine code: Illegal virtual register for instruction ***
- function:    __ceilh
- basic block: %bb.0 Entry (0x81ff134d8) [0B;304B)
- instruction: 24B	MOVSSmr %stack.3, 1, $noreg, 0, $noreg, %42:fr16 :: (store (s32) into %stack.3, align 2)
- operand 5:   %42:fr16
Expected a FR32 register, but got a FR16 register
LLVM ERROR: Found 1 machine code errors.
error: the following test command crashed:
/usr/home/mike/project/zig/work/main-assertx/zig-cache/o/204bc2aff0d7ef42fef002d9788f8eef/test
error: test...
error: The following command exited with error code 1:
/usr/home/mike/project/zig/work/main-assertx/_build/bin/zig test --stack 33554432 /usr/home/mike/project/zig/work/main-assertx/src/test.zig -lc -cflags -std=c++14 -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -D_GNU_SOURCE -fvisibility-inlines-hidden -fno-exceptions -fno-rtti -Werror=type-limits -Wno-missing-braces -Wno-comment -DNDEBUG=1 -- /usr/home/mike/project/zig/work/main-assertx/src/zig_llvm.cpp /usr/home/mike/project/zig/work/main-assertx/src/zig_clang.cpp /usr/home/mike/project/zig/work/main-assertx/src/zig_llvm-ar.cpp /usr/home/mike/project/zig/work/main-assertx/src/zig_clang_driver.cpp /usr/home/mike/project/zig/work/main-assertx/src/zig_clang_cc1_main.cpp /usr/home/mike/project/zig/work/main-assertx/src/zig_clang_cc1as_main.cpp /usr/home/mike/project/zig/work/main-assertx/src/windows_sdk.cpp -lclangFrontendTool -lclangCodeGen -lclangFrontend -lclangDriver -lclangSerialization -lclangSema -lclangStaticAnalyzerFrontend -lclangStaticAnalyzerCheckers -lclangStaticAnalyzerCore -lclangAnalysis -lclangASTMatchers -lclangAST -lclangParse -lclangSema -lclangBasic -lclangEdit -lclangLex -lclangARCMigrate -lclangRewriteFrontend -lclangRewrite -lclangCrossTU -lclangIndex -lclangToolingCore -lclangExtractAPI -lclangSupport -llldMinGW -llldELF -llldCOFF -llldWasm -llldMachO -llldCommon -lLLVMWindowsManifest -lLLVMWindowsDriver -lLLVMXRay -lLLVMLibDriver -lLLVMDlltoolDriver -lLLVMCoverage -lLLVMLineEditor -lLLVMXCoreDisassembler -lLLVMXCoreCodeGen -lLLVMXCoreDesc -lLLVMXCoreInfo -lLLVMX86TargetMCA -lLLVMX86Disassembler -lLLVMX86AsmParser -lLLVMX86CodeGen -lLLVMX86Desc -lLLVMX86Info -lLLVMWebAssemblyDisassembler -lLLVMWebAssemblyAsmParser -lLLVMWebAssemblyCodeGen -lLLVMWebAssemblyDesc -lLLVMWebAssemblyUtils -lLLVMWebAssemblyInfo -lLLVMVEDisassembler -lLLVMVEAsmParser -lLLVMVECodeGen -lLLVMVEDesc -lLLVMVEInfo -lLLVMSystemZDisassembler -lLLVMSystemZAsmParser -lLLVMSystemZCodeGen -lLLVMSystemZDesc -lLLVMSystemZInfo -lLLVMSparcDisassembler -lLLVMSparcAsmParser -lLLVMSparcCodeGen -lLLVMSparcDesc -lLLVMSparcInfo -lLLVMRISCVDisassembler -lLLVMRISCVAsmParser -lLLVMRISCVCodeGen -lLLVMRISCVDesc -lLLVMRISCVInfo -lLLVMPowerPCDisassembler -lLLVMPowerPCAsmParser -lLLVMPowerPCCodeGen -lLLVMPowerPCDesc -lLLVMPowerPCInfo -lLLVMNVPTXCodeGen -lLLVMNVPTXDesc -lLLVMNVPTXInfo -lLLVMMSP430Disassembler -lLLVMMSP430AsmParser -lLLVMMSP430CodeGen -lLLVMMSP430Desc -lLLVMMSP430Info -lLLVMMipsDisassembler -lLLVMMipsAsmParser -lLLVMMipsCodeGen -lLLVMMipsDesc -lLLVMMipsInfo -lLLVMLanaiDisassembler -lLLVMLanaiCodeGen -lLLVMLanaiAsmParser -lLLVMLanaiDesc -lLLVMLanaiInfo -lLLVMHexagonDisassembler -lLLVMHexagonCodeGen -lLLVMHexagonAsmParser -lLLVMHexagonDesc -lLLVMHexagonInfo -lLLVMBPFDisassembler -lLLVMBPFAsmParser -lLLVMBPFCodeGen -lLLVMBPFDesc -lLLVMBPFInfo -lLLVMAVRDisassembler -lLLVMAVRAsmParser -lLLVMAVRCodeGen -lLLVMAVRDesc -lLLVMAVRInfo -lLLVMARMDisassembler -lLLVMARMAsmParser -lLLVMARMCodeGen -lLLVMARMDesc -lLLVMARMUtils -lLLVMARMInfo -lLLVMAMDGPUTargetMCA -lLLVMAMDGPUDisassembler -lLLVMAMDGPUAsmParser -lLLVMAMDGPUCodeGen -lLLVMAMDGPUDesc -lLLVMAMDGPUUtils -lLLVMAMDGPUInfo -lLLVMAArch64Disassembler -lLLVMAArch64AsmParser -lLLVMAArch64CodeGen -lLLVMAArch64Desc -lLLVMAArch64Utils -lLLVMAArch64Info -lLLVMOrcJIT -lLLVMMCJIT -lLLVMJITLink -lLLVMInterpreter -lLLVMExecutionEngine -lLLVMRuntimeDyld -lLLVMOrcTargetProcess -lLLVMOrcShared -lLLVMDWP -lLLVMDebugInfoGSYM -lLLVMOption -lLLVMObjectYAML -lLLVMObjCopy -lLLVMMCA -lLLVMMCDisassembler -lLLVMLTO -lLLVMPasses -lLLVMCFGuard -lLLVMCoroutines -lLLVMObjCARCOpts -lLLVMipo -lLLVMVectorize -lLLVMLinker -lLLVMInstrumentation -lLLVMFrontendOpenMP -lLLVMFrontendOpenACC -lLLVMExtensions -lLLVMDWARFLinker -lLLVMGlobalISel -lLLVMMIRParser -lLLVMAsmPrinter -lLLVMSelectionDAG -lLLVMCodeGen -lLLVMIRReader -lLLVMAsmParser -lLLVMInterfaceStub -lLLVMFileCheck -lLLVMFuzzMutate -lLLVMTarget -lLLVMScalarOpts -lLLVMInstCombine -lLLVMAggressiveInstCombine -lLLVMTransformUtils -lLLVMBitWriter -lLLVMAnalysis -lLLVMProfileData -lLLVMSymbolize -lLLVMDebugInfoPDB -lLLVMDebugInfoMSF -lLLVMDebugInfoDWARF -lLLVMObject -lLLVMTextAPI -lLLVMMCParser -lLLVMMC -lLLVMDebugInfoCodeView -lLLVMBitReader -lLLVMFuzzerCLI -lLLVMCore -lLLVMRemarks -lLLVMBitstreamReader -lLLVMBinaryFormat -lLLVMSupport -lLLVMDemangle -lz -lzstd -lc++ --cache-dir /usr/home/mike/project/zig/work/main-assertx/zig-cache --global-cache-dir /home/mike/project/zig/work/main-assertx/zig-cache --name test --pkg-begin build_options /usr/home/mike/project/zig/work/main-assertx/zig-cache/options/WDZsgaMfxB0coxSAvNciPaKpwnsnmAHMzH9Wi__IFl8CObB1WqfVnBmvHgRZS_ow --pkg-end -L /opt/llvm-freebsd13.1-amd64-15.0.6-release-assertx/lib -I /opt/llvm-freebsd13.1-amd64-15.0.6-release-assertx/include --zig-lib-dir /usr/home/mike/project/zig/work/main-assertx/lib --main-pkg-path /usr/home/mike/project/zig/work/main-assertx --enable-cache
error: the following build command failed with exit code 1:
/usr/home/mike/project/zig/work/main-assertx/zig-cache/o/eac749af745b5d7612557325fa77dc6d/build /usr/home/mike/project/zig/work/main-assertx/_build/bin/zig /usr/home/mike/project/zig/work/main-assertx /usr/home/mike/project/zig/work/main-assertx/zig-cache /home/mike/project/zig/work/main-assertx/zig-cache test docs -Dstatic-llvm --search-prefix /opt/llvm-freebsd13.1-amd64-15.0.6-release-assertx --zig-lib-dir lib -Dskip-non-native
REDUCED: zig test -Itest test/behavior/threadlocal.zig --test-filter "pointer to thread local array" 
$ zig test -Itest test/behavior/threadlocal.zig --test-filter "pointer to thread local array"
LLVM Emit Object...
# After Instruction Selection
# Machine code for function threadlocal.test.pointer to thread local array: IsSSA, TracksLiveness
Frame Objects:
  fi#0: size=8, align=8, at location [SP+8]
Function Live Ins: $rdi in %1

bb.0.Entry:
  successors: %bb.1, %bb.2
  liveins: $rdi
  %1:gr64 = COPY $rdi
  %3:gr64 = LEA64r $rip, 1, $noreg, @"threadlocal.test.pointer to thread local array__anon_974", $noreg, debug-location !2797; threadlocal.zig:30:5
  MOV64mr %stack.0, 1, $noreg, 0, $noreg, %3:gr64, debug-location !2797 :: (store (s64) into %ir.1); threadlocal.zig:30:5
  %2:gr8 = MOV8ri 1, debug-location !2798; threadlocal.zig:31:28
  TEST8ri %2:gr8, 1, implicit-def $eflags, debug-location !2798; threadlocal.zig:31:28
  JCC_1 %bb.1, 5, implicit $eflags, debug-location !2798; threadlocal.zig:31:28
  JMP_1 %bb.2, debug-location !2798; threadlocal.zig:31:28

bb.1.Then:
; predecessors: %bb.0
  successors: %bb.3

  JMP_1 %bb.3, debug-location !2798; threadlocal.zig:31:28

bb.2.Else:
; predecessors: %bb.0

  %4:gr32 = MOV32r0 implicit-def $eflags, debug-location !2798; threadlocal.zig:31:28
  %5:gr64 = SUBREG_TO_REG 0, %4:gr32, %subreg.sub_32bit, debug-location !2798; threadlocal.zig:31:28
  %6:gr64 = MOV32ri64 11, debug-location !2798; threadlocal.zig:31:28
  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  $rdi = COPY %5:gr64, debug-location !2798; threadlocal.zig:31:28
  $rsi = COPY %6:gr64, debug-location !2798; threadlocal.zig:31:28
  CALL64pcrel32 @builtin.panicStartGreaterThanEnd, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, debug-location !2798; threadlocal.zig:31:28
  ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28

bb.3.Block:
; predecessors: %bb.1
  successors: %bb.4, %bb.5

  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  TLS_base_addr64 $noreg, 1, $noreg, target-flags(x86-tlsld) @threadlocal.buffer, $noreg, implicit-def $rax, implicit-def dead $rcx, implicit-def dead $rdx, implicit-def dead $rsi, implicit-def dead $rdi, implicit-def dead $r8, implicit-def dead $r9, implicit-def dead $r10, implicit-def dead $r11, implicit-def dead $fp0, implicit-def dead $fp1, implicit-def dead $fp2, implicit-def dead $fp3, implicit-def dead $fp4, implicit-def dead $fp5, implicit-def dead $fp6, implicit-def dead $fp7, implicit-def dead $st0, implicit-def dead $st1, implicit-def dead $st2, implicit-def dead $st3, implicit-def dead $st4, implicit-def dead $st5, implicit-def dead $st6, implicit-def dead $st7, implicit-def dead $mm0, implicit-def dead $mm1, implicit-def dead $mm2, implicit-def dead $mm3, implicit-def dead $mm4, implicit-def dead $mm5, implicit-def dead $mm6, implicit-def dead $mm7, implicit-def dead $xmm0, implicit-def dead $xmm1, implicit-def dead $xmm2, implicit-def dead $xmm3, implicit-def dead $xmm4, implicit-def dead $xmm5, implicit-def dead $xmm6, implicit-def dead $xmm7, implicit-def dead $xmm8, implicit-def dead $xmm9, implicit-def dead $xmm10, implicit-def dead $xmm11, implicit-def dead $xmm12, implicit-def dead $xmm13, implicit-def dead $xmm14, implicit-def dead $xmm15, implicit-def dead $eflags, implicit-def dead $df, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  %8:gr64 = COPY $rax, debug-location !2798; threadlocal.zig:31:28
  %9:gr64 = LEA64r %8:gr64, 1, $noreg, target-flags(x86-dtpoff) @threadlocal.buffer, $noreg, debug-location !2798; threadlocal.zig:31:28
  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  %10:gr64 = LEA64r $rip, 1, $noreg, @"threadlocal.test.pointer to thread local array__anon_974", $noreg, debug-location !2798; threadlocal.zig:31:28
  %11:gr64 = MOV32ri64 11
  $rdi = COPY %9:gr64, debug-location !2798; threadlocal.zig:31:28
  $rsi = COPY %11:gr64, debug-location !2798; threadlocal.zig:31:28
  $rdx = COPY %10:gr64, debug-location !2798; threadlocal.zig:31:28
  $rcx = COPY %11:gr64, debug-location !2798; threadlocal.zig:31:28
  CALL64pcrel32 @mem.copy__anon_1213, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $rcx, implicit-def $rsp, implicit-def $ssp, debug-location !2798; threadlocal.zig:31:28
  ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !2798; threadlocal.zig:31:28
  %7:gr8 = MOV8ri 1, debug-location !2799; threadlocal.zig:32:49
  TEST8ri %7:gr8, 1, implicit-def $eflags, debug-location !2799; threadlocal.zig:32:49
  JCC_1 %bb.4, 5, implicit $eflags, debug-location !2799; threadlocal.zig:32:49
  JMP_1 %bb.5, debug-location !2799; threadlocal.zig:32:49

bb.4.Then1:
; predecessors: %bb.3
  successors: %bb.6

  JMP_1 %bb.6, debug-location !2799; threadlocal.zig:32:49

bb.5.Else2:
; predecessors: %bb.3

  %12:gr32 = MOV32r0 implicit-def $eflags, debug-location !2799; threadlocal.zig:32:49
  %13:gr64 = SUBREG_TO_REG 0, %12:gr32, %subreg.sub_32bit, debug-location !2799; threadlocal.zig:32:49
  %14:gr64 = MOV32ri64 11, debug-location !2799; threadlocal.zig:32:49
  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  $rdi = COPY %13:gr64, debug-location !2799; threadlocal.zig:32:49
  $rsi = COPY %14:gr64, debug-location !2799; threadlocal.zig:32:49
  CALL64pcrel32 @builtin.panicStartGreaterThanEnd, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, debug-location !2799; threadlocal.zig:32:49
  ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49

bb.6.Block3:
; predecessors: %bb.4
  successors: %bb.8, %bb.7

  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  TLS_base_addr64 $noreg, 1, $noreg, target-flags(x86-tlsld) @threadlocal.buffer, $noreg, implicit-def $rax, implicit-def dead $rcx, implicit-def dead $rdx, implicit-def dead $rsi, implicit-def dead $rdi, implicit-def dead $r8, implicit-def dead $r9, implicit-def dead $r10, implicit-def dead $r11, implicit-def dead $fp0, implicit-def dead $fp1, implicit-def dead $fp2, implicit-def dead $fp3, implicit-def dead $fp4, implicit-def dead $fp5, implicit-def dead $fp6, implicit-def dead $fp7, implicit-def dead $st0, implicit-def dead $st1, implicit-def dead $st2, implicit-def dead $st3, implicit-def dead $st4, implicit-def dead $st5, implicit-def dead $st6, implicit-def dead $st7, implicit-def dead $mm0, implicit-def dead $mm1, implicit-def dead $mm2, implicit-def dead $mm3, implicit-def dead $mm4, implicit-def dead $mm5, implicit-def dead $mm6, implicit-def dead $mm7, implicit-def dead $xmm0, implicit-def dead $xmm1, implicit-def dead $xmm2, implicit-def dead $xmm3, implicit-def dead $xmm4, implicit-def dead $xmm5, implicit-def dead $xmm6, implicit-def dead $xmm7, implicit-def dead $xmm8, implicit-def dead $xmm9, implicit-def dead $xmm10, implicit-def dead $xmm11, implicit-def dead $xmm12, implicit-def dead $xmm13, implicit-def dead $xmm14, implicit-def dead $xmm15, implicit-def dead $eflags, implicit-def dead $df, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  %15:gr64 = COPY $rax, debug-location !2799; threadlocal.zig:32:49
  %16:gr64 = LEA64r %15:gr64, 1, $noreg, target-flags(x86-dtpoff) @threadlocal.buffer, $noreg, debug-location !2799; threadlocal.zig:32:49
  %17:gr64 = LEA64r $rip, 1, $noreg, @"threadlocal.test.pointer to thread local array__anon_974", $noreg, debug-location !2799; threadlocal.zig:32:49
  %18:gr64 = MOV32ri64 11
  $rdi = COPY %1:gr64, debug-location !2799; threadlocal.zig:32:49
  $rsi = COPY %16:gr64, debug-location !2799; threadlocal.zig:32:49
  $rdx = COPY %18:gr64, debug-location !2799; threadlocal.zig:32:49
  $rcx = COPY %17:gr64, debug-location !2799; threadlocal.zig:32:49
  $r8 = COPY %18:gr64, debug-location !2799; threadlocal.zig:32:49
  CALL64pcrel32 @testing.expectEqualSlices__anon_1256, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rdi, implicit $rsi, implicit $rdx, implicit $rcx, implicit $r8, implicit-def $rsp, implicit-def $ssp, implicit-def $ax, debug-location !2799; threadlocal.zig:32:49
  ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
  %19:gr16 = COPY $ax, debug-location !2799; threadlocal.zig:32:49
  %0:gr16 = COPY %19:gr16, debug-location !2799; threadlocal.zig:32:49
  CMP16ri8 %0:gr16, 0, implicit-def $eflags, debug-location !2799; threadlocal.zig:32:49
  JCC_1 %bb.8, 4, implicit $eflags, debug-location !2799; threadlocal.zig:32:49

bb.7.TryRet:
; predecessors: %bb.6

  ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2800; threadlocal.zig:32:5
  $rdi = COPY %1:gr64, debug-location !2800; threadlocal.zig:32:5
  CALL64pcrel32 @builtin.returnError, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rdi, debug-location !2800; threadlocal.zig:32:5
  ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2800; threadlocal.zig:32:5
  $ax = COPY %0:gr16, debug-location !2800; threadlocal.zig:32:5
  RET64 implicit $ax, debug-location !2800; threadlocal.zig:32:5

bb.8.TryCont:
; predecessors: %bb.6

  %20:gr32 = MOV32r0 implicit-def $eflags, debug-location !2800; threadlocal.zig:32:5
  %21:gr16 = COPY %20.sub_16bit:gr32, debug-location !2800; threadlocal.zig:32:5
  $ax = COPY %21:gr16, debug-location !2800; threadlocal.zig:32:5
  RET64 implicit $ax, debug-location !2800; threadlocal.zig:32:5

# End machine code for function threadlocal.test.pointer to thread local array.

*** Bad machine code: FrameSetup is after another FrameSetup ***
- function:    threadlocal.test.pointer to thread local array
- basic block: %bb.6 Block3 (0x810ee2a48)
- instruction: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49

*** Bad machine code: FrameDestroy is not after a FrameSetup ***
- function:    threadlocal.test.pointer to thread local array
- basic block: %bb.6 Block3 (0x810ee2a48)
- instruction: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !2799; threadlocal.zig:32:49
LLVM ERROR: Found 2 machine code errors.
zsh: abort      zig test -Itest test/behavior/threadlocal.zig --test-filter

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bug Observed behavior contradicts documented or intended behavior os-freebsd
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@andrewrk @mikdusan