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You must be logged in to vote 💬 Multi-Core Architecture
enhancementNew feature or request help wantedExtra attention is needed -
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You must be logged in to vote 💬 wfi instruction with global interrupts disabled
risc-v complianceModification to comply with official RISC-V specs. -
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You must be logged in to vote 💬 Brackets Appear Red in Generated Assembly File (.asm)
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You must be logged in to vote 💬 typedef neorv32_uart0_t/neorv32_uart1_t change to neorv32_uart_t
SWsoftware-related coding-styleRelated to the HW/SW coding style -
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enhancementNew feature or request HWhardware-related -
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You must be logged in to vote 💬 Move this repo to a (new) GitHub organization
help wantedExtra attention is needed questionFurther information is requested -
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