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Fix HLT path selection and BaselineValidator module addition for HI (same as #2582 but for master) #25083

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merged 3 commits into from Nov 2, 2018
Merged

Fix HLT path selection and BaselineValidator module addition for HI (same as #2582 but for master) #25083

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9eda749
Fix HLT path selection and BaselineValidator module addition for HI
Nov 1, 2018
1a9a6a7
adjust multiplicity filter threshold
Nov 1, 2018
5f659ac
fix HLT path selection for both Strip and Pixel
Nov 1, 2018
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2 changes: 1 addition & 1 deletion DQM/Integration/python/clients/pixel_dqm_sourceclient-live_cfg.py
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Expand Up @@ -148,7 +148,7 @@

process.load('HLTrigger.HLTfilters.hltHighLevel_cfi')
if (process.runType.getRunType() == process.runType.hi_run):
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_HIZeroBias_*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*','HLT*SingleMu*' , 'HLT_HICentralityVeto*' , 'HLT_HIMinBias*')
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_HIZeroBias_*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*','HLT*SingleMu*' , 'HLT_HICentralityVeto*' , 'HLT_HIMinimumBias*','HLT_HIPhysics*')
else:
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*','HLT*SingleMu*')
process.hltHighLevel.andOr = cms.bool(True)
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20 changes: 15 additions & 5 deletions DQM/Integration/python/clients/sistrip_dqm_sourceclient-live_cfg.py
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Expand Up @@ -189,7 +189,7 @@
#--------------------------
# HI Runs HLT path
#--------------------------
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_HIZeroBias*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*' , 'HLT_HICentralityVeto*','HLT_HIMinBias*')
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_HIZeroBias*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*' , 'HLT_HICentralityVeto*','HLT_HIMinimumBias*', 'HLT_HIPhysics*')
else:
process.hltHighLevel.HLTPaths = cms.vstring( 'HLT_ZeroBias_*' , 'HLT_ZeroBias1_*' , 'HLT_PAZeroBias_*' , 'HLT_PAZeroBias1_*', 'HLT_PAL1MinimumBiasHF_OR_SinglePixelTrack_*')
process.hltHighLevel.andOr = cms.bool(True)
Expand Down Expand Up @@ -512,8 +512,9 @@
if ((process.runType.getRunType() == process.runType.hi_run) and live):
process.source.SelectEvents = cms.untracked.vstring(
'HLT_HICentralityVeto*',
'HLT_HIMinBias*',
'HLT_HIZeroBias*'
# 'HLT_HIMinimumBias*',
# 'HLT_HIZeroBias*'
'HLT_HIPhysics*'
)

process.DQMStore.referenceFileName = '/dqmdata/dqm/reference/sistrip_reference_pp.root'
Expand Down Expand Up @@ -584,10 +585,17 @@
import HLTrigger.special.hltPixelActivityFilter_cfi
process.multFilter = HLTrigger.special.hltPixelActivityFilter_cfi.hltPixelActivityFilter.clone(
inputTag = cms.InputTag('siPixelClusters'),
minClusters = cms.uint32(10000),
minClusters = cms.uint32(1),
maxClusters = cms.uint32(50000)
)

# BaselineValidator Module
from EventFilter.SiStripRawToDigi.SiStripDigis_cfi import siStripDigis as _siStripDigis
process.siStripDigisNoZS=_siStripDigis.clone()
process.siStripDigisNoZS.ProductLabel = cms.InputTag("rawDataCollector")
process.SiStripBaselineValidator.srcProcessedRawDigi = cms.InputTag('siStripDigisNoZS','ZeroSuppressed')


from RecoTracker.TkSeedingLayers.PixelLayerTriplets_cfi import *
process.PixelLayerTriplets.BPix.HitProducer = cms.string('siPixelRecHitsPreSplitting')
process.PixelLayerTriplets.FPix.HitProducer = cms.string('siPixelRecHitsPreSplitting')
Expand All @@ -602,12 +610,14 @@
process.consecutiveHEs*
process.hltTriggerTypeFilter*
process.siStripFEDCheck *
process.siStripDigisNoZS*
process.SiStripBaselineValidator*
process.RecoForDQM_LocalReco*
process.siPixelClusters*
process.multFilter*
process.DQMCommon*
process.SiStripClients*
process.SiStripSources_LocalReco*
process.multFilter*
##### TRIGGER SELECTION #####
process.hltHighLevel*
process.RecoForDQM_TrkReco*
Expand Down
4 changes: 2 additions & 2 deletions DQM/SiStripMonitorDigi/interface/SiStripBaselineValidator.h
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Expand Up @@ -18,7 +18,7 @@

#include "DataFormats/Common/interface/DetSetVector.h"
#include "DataFormats/Common/interface/DetSetVectorNew.h"
#include "DataFormats/SiStripDigi/interface/SiStripRawDigi.h"
#include "DataFormats/SiStripDigi/interface/SiStripDigi.h"

#include <iostream>
#include <cstdlib>
Expand All @@ -44,7 +44,7 @@ class SiStripBaselineValidator : public DQMEDAnalyzer
MonitorElement *h1ADC_vs_strip_;

edm::InputTag srcProcessedRawDigi_;
edm::EDGetTokenT<edm::DetSetVector<SiStripRawDigi> > moduleRawDigiToken_;
edm::EDGetTokenT<edm::DetSetVector<SiStripDigi> > moduleRawDigiToken_;

};
#endif
37 changes: 19 additions & 18 deletions DQM/SiStripMonitorDigi/src/SiStripBaselineValidator.cc
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Expand Up @@ -37,7 +37,7 @@ using namespace std;
SiStripBaselineValidator::SiStripBaselineValidator(const edm::ParameterSet& conf){

srcProcessedRawDigi_ = conf.getParameter<edm::InputTag>( "srcProcessedRawDigi" );
moduleRawDigiToken_ = consumes<edm::DetSetVector<SiStripRawDigi> >(conf.getParameter<edm::InputTag>( "srcProcessedRawDigi" ) );
moduleRawDigiToken_ = consumes<edm::DetSetVector<SiStripDigi> >(conf.getParameter<edm::InputTag>( "srcProcessedRawDigi" ) );
}

SiStripBaselineValidator::~SiStripBaselineValidator()
Expand All @@ -60,37 +60,38 @@ void SiStripBaselineValidator::bookHistograms(DQMStore::IBooker & ibooker, const

void SiStripBaselineValidator::analyze(const edm::Event& e, const edm::EventSetup& es)
{
edm::Handle< edm::DetSetVector<SiStripRawDigi> > moduleRawDigi;
edm::Handle< edm::DetSetVector<SiStripDigi> > moduleRawDigi;
e.getByToken( moduleRawDigiToken_, moduleRawDigi );
edm::DetSetVector<SiStripRawDigi>::const_iterator itRawDigis = moduleRawDigi->begin();
edm::DetSetVector<SiStripDigi>::const_iterator itRawDigis = moduleRawDigi->begin();

int NumResAPVs=0;
for (; itRawDigis != moduleRawDigi->end(); ++itRawDigis) { ///loop over modules


edm::DetSet<SiStripRawDigi>::const_iterator itRaw = itRawDigis->begin();
int strip =0, totADC=0;
edm::DetSet<SiStripDigi>::const_iterator itRaw = itRawDigis->begin();
int strip =0, totStripAPV=0, apv=0,prevapv=itRaw->strip()/128;

for(;itRaw != itRawDigis->end(); ++itRaw, ++strip){ /// loop over strips
for(;itRaw != itRawDigis->end(); ++itRaw){ /// loop over strips

strip=itRaw->strip();
apv=strip/128;
float adc = itRaw->adc();
h1ADC_vs_strip_->Fill(strip,adc); /// adc vs strip



totADC+= adc;

if(strip%127 ==0){
if(totADC!= 0){
totADC =0;

NumResAPVs++;

}
if(prevapv!=apv){
if(totStripAPV>64){
NumResAPVs++;
}
prevapv=apv;
totStripAPV=0;
}
if(adc>0) ++totStripAPV;


} ///strip loop ends

if(totStripAPV>64){
NumResAPVs++;
}

} /// module loop

Expand Down