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[FIRRTL] Performance Degradation in Dedup Runtime between Chisel3.6 and Chisel6
#6979
opened May 1, 2024 by
Heaton15
Printf-encoded verification deprecation
FIRRTL
Involving the `firrtl` dialect
Tracking Issue
A tracking issue for a set of features or large code changes
#6970
opened Apr 30, 2024 by
dtzSiFive
[HW] Inner symbols dropped by InlineModules
bug
Something isn't working
HW
Involving the `hw` dialect
#6967
opened Apr 30, 2024 by
uenoku
[HWToLLVM] ArrayGet lowering produces out-of-bounds memory access
bug
Something isn't working
HW
Involving the `hw` dialect
#6949
opened Apr 24, 2024 by
fabianschuiki
[comb] Break out some canonicalizations into optimization pass
Comb
Involving the `comb` dialect
#6931
opened Apr 18, 2024 by
teqdruid
Duplicate expressions possibly due to spilled event control expressions in LTL statements
#6930
opened Apr 18, 2024 by
jackkoenig
[FIRRTL][InferWidths] When there is no unique minimal solution for width constraints, what should be the width?
#6924
opened Apr 17, 2024 by
wky17
[SMT] Add quantifier attribute and pattern support to ExportSMTLIB
good first issue
Good for newcomers
#6913
opened Apr 11, 2024 by
maerhart
[Comb] Missed optimization opportunity for multiply used boolean operations
#6840
opened Mar 18, 2024 by
uenoku
[FIRRTL] LowerMemory change in #6719 leads to ambiguous targets in EmitOMIR
FIRRTL
Involving the `firrtl` dialect
#6830
opened Mar 14, 2024 by
mikeurbach
[HGLDD] Emit HW struct and array types
Debug
good first issue
Good for newcomers
#6816
opened Mar 12, 2024 by
fabianschuiki
[FIRRTL] Add back owning module constraint for local targets after removing use of ExtractInstances
#6812
opened Mar 12, 2024 by
mikeurbach
[Arc] Add basic assertion support
Arc
Involving the `arc` dialect
good first issue
Good for newcomers
#6810
opened Mar 11, 2024 by
fabianschuiki
[FIRRTL] Lint XMRs in the "Design"
FIRRTL
Involving the `firrtl` dialect
#6803
opened Mar 8, 2024 by
seldridge
[FIRRTL] Change FIRRTL Parser to Require Commas
FIRRTL
Involving the `firrtl` dialect
#6791
opened Mar 6, 2024 by
seldridge
[ImportVerilog] Make AST traveral non-recursive
Verilog/SystemVerilog
Involving a Verilog dialect
#6776
opened Mar 3, 2024 by
fabianschuiki
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Updated in the last three days: updated:>2024-04-30.