BOOMv2

This marks BOOM version 2.0. BOOMv2 uses a distributed issue window; a split physical register file (separate integer and FP register files); and a 3-cycle fetch unit (+1 from BOOMv1). The pipeline length is configurable from 6 stages to 9 stages (fetch to integer ALU writeback). It implements RV64G and version v1.9 of the privileged ISA.

This version should be used with the following commit of rocket-chip (from the boom branch):
chipsalliance/rocket-chip@b3e9e36