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d-flipflop

Here are 8 public repositories matching this topic...

FarshidKeivanian / Multi-objective-optimization-of-MOSFETs-channel-widths-and-supply-voltage-in-the-proposed-dual-edge-

FuzzyNSGA-II-Algorithm (Fuzzy adaptive optimisation method)

Updated Jul 2, 2022
MATLAB

mishal23 / dds-lab

Codes and simulation of circuits pertaining to software Lab for Course CO204 - Design of Digital Systems

counter register verilog dds complement pipo d-flipflop

Updated Nov 9, 2017
Verilog

Zannatul-Naim / Digital-System-Design

Digital System Design Lab Codes using Verilog

verilog adder half-adder d-flipflop full-adder flipflop ripple-carry-adder jk-flipflop t-flipflop

Updated Nov 27, 2022
Verilog

Dare-marvel / Digital-System-and-Microprocessors--DSM--

🔧 Welcome to the Digital Systems and Microprocessors Repository! 📚✨ Immerse yourself in a meticulously curated knowledge reservoir on Digital Systems and Microprocessors. 🌐💡 Explore the intricacies of digital circuitry, processor architectures, and system design. 🚀💻 Master the art of efficient digital computing in this dynamic space! 👨‍💻🌐

digital-logic-design d-flipflop micro-processor flip-flops k-map proteus-v8 4-bit-comparator jk-flipflop 5-bit-comparator 8-bit-comparator sr-flip-flop

Updated Aug 2, 2023

newajsharif91 / Verilog_HDL_Digital-System-Design

CSE-2112 Digital Syatem Design LAb

verilog adder flip-flop half-adder d-flipflop full-adder

Updated Jan 20, 2023
Verilog

roman-komac / NPMP_BIO

NPMP 2017/18 - BIO seminar D master-slave flip-flop

counter biological-simulations d-flipflop bsim synchronous-flipflop

Updated Jan 18, 2018
Java

Ujjwal1810 / Verification_enviornment

Verification environments of communication and bus protocol

fifo uart-protocol i2c-protocol spi-protocol d-flipflop

Updated Dec 17, 2023

levyashvin / verilog_codes

basic implementation of logic structures using verilog (revising github)

registers pipo d-flipflop full-adder sipo sequence-detector siso piso verilog-testbenches synchronous-counter priority-encoder jk-flipflop t-flipflop sr-flip-flop full-subtractor half-subtractor

Updated Feb 29, 2024
Verilog

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