This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA.
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Updated
May 28, 2024 - C
This repository contains numerous projects that were successfully implemented on an Altera Cyclone IV FPGA.
HDL support for VS Code
A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.
Repurposing existing HDL tools to help writing better code
An abstraction library for interfacing EDA tools
A digital clock system implemented with VHDL via Intel Quartus Prime and ModelSim.
Verilog code examples and materials for Computer Organization.
The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boards, including those from Xilinx and Altera.
Max Destil's Advanced VLSI Design course project portfolio. See link for course description.
Verilog implementation of a DFS search and RISC-V processor in Single-Cycle, Multi-Cycle and Pipeline
Verilog programs in gate level, dataflow & behavioural modelling with testbenches written in intel FPGA tested with ModelSim simulator
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