FPGA and VLSI A collection of designs for FPGA's at RTL level with Verilog as well as transistor level with Cadence Encounter and Virtuoso. Some notable highlights: Variable Width Array Multiplier in Verilog and Integrated Circuit (13000 Leaf cells for 64x64!!) 8-bit Ripple Carry Adder (RCA) engineered by hand in Virtuoso