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- Add initial support for ARMv8A, ARMV7R and ARMV8R #45

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- Add initial support for ARMv8A, ARMV7R and ARMV8R #45

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32 changes: 30 additions & 2 deletions ARM.CMSIS.pdsc
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?>

<package schemaVersion="1.7.36" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.36/schema/PACK.xsd">
<package schemaVersion="1.7.37" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="https://raw.githubusercontent.com/Open-CMSIS-Pack/Open-CMSIS-Pack-Spec/v1.7.37/schema/PACK.xsd">
<name>CMSIS</name>
<description overview="./CMSIS/Documentation/Overview.md">CMSIS (Common Microcontroller Software Interface Standard)</description>
<vendor>ARM</vendor>
Expand Down Expand Up @@ -613,6 +613,25 @@
<accept Dcore="Cortex-A7"/>
<accept Dcore="Cortex-A9"/>
</condition>
<condition id="ARMv8-A Device">
<description>Armv8-A architecture based device</description>
<accept Dcore="Cortex-A35"/>
<accept Dcore="Cortex-A53"/>
<accept Dcore="Cortex-A55"/>
<accept Dcore="Cortex-A57"/>
</condition>
<condition id="ARMv7_8-A Device">
<description>Armv7-A and Armv8-A architecture based device</description>
<accept condition="ARMv7-A Device"/>
<accept condition="ARMv8-A Device"/>
</condition>
<condition id="ARMv7-R Device">
<description>Armv7-R architecture based device</description>
<accept Dcore="Cortex-R4"/>
<accept Dcore="Cortex-R5"/>
<accept Dcore="Cortex-R7"/>
<accept Dcore="Cortex-R8"/>
</condition>

<condition id="TrustZone">
<description>TrustZone</description>
Expand Down Expand Up @@ -660,7 +679,7 @@
</files>
</component>

<component Cclass="CMSIS" Cgroup="CORE" Cversion="6.1.0" condition="ARMv7-A Device" >
<component Cclass="CMSIS" Cgroup="CORE" Cversion="6.1.0" condition="ARMv7_8-A Device" >
<description>CMSIS-CORE for Cortex-A</description>
<files>
<!-- CPU independent -->
Expand All @@ -669,6 +688,15 @@
</files>
</component>

<component Cclass="CMSIS" Cgroup="CORE" Cversion="6.1.0" condition="ARMv7-R Device" >
<description>CMSIS-CORE for Cortex-R</description>
<files>
<!-- CPU independent -->
<!-- <file category="doc" name="CMSIS/Documentation/html/Core_R/index.html"/> -->
<file category="include" name="CMSIS/Core/Include/"/>
</files>
</component>

<!-- IRQ Controller -->
<component Cclass="Device" Cgroup="IRQ Controller" Csub="GIC" Capiversion="1.0.0" Cversion="1.2.0" condition="ARMv7-A Device">
<description>IRQ Controller implementation using GIC</description>
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2,340 changes: 2,340 additions & 0 deletions CMSIS/Core/Include/a-profile/armv7a.h
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10 changes: 5 additions & 5 deletions CMSIS/Core/Include/a-profile/cmsis_cp15.h → CMSIS/Core/Include/a-profile/armv7a_cp15.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
* Copyright (c) 2009-2024 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand Down Expand Up @@ -362,10 +362,10 @@ __STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void)

/******************************* VIRTUAL TIMER *******************************/
/** see [ARM DDI 0406C.d] :
. §B4.1.31 "CNTV_CTL, Counter-timer Virtual Timer Control register"
. §B4.1.32 "CNTV_CVAL, Counter-timer Virtual Timer CompareValue register"
. §B4.1.33 "CNTV_TVAL, Counter-timer Virtual Timer TimerValue register"
. §B4.1.34 "CNTVCT, Counter-timer Virtual Count register"
* B4.1.31 "CNTV_CTL, Counter-timer Virtual Timer Control register"
* B4.1.32 "CNTV_CVAL, Counter-timer Virtual Timer CompareValue register"
* B4.1.33 "CNTV_TVAL, Counter-timer Virtual Timer TimerValue register"
* B4.1.34 "CNTVCT, Counter-timer Virtual Count register"
**/
/** \brief Set CNTV_TVAL
This function assigns the given value to VL1 Virtual Timer Value Register (CNTV_TVAL).
Expand Down
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