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Introduce AArch32 support for PSCI library #678
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danh-arm
merged 19 commits into
ARM-software:integration
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soby-mathew:sm/PSCI_AArch32
Aug 18, 2016
Merged
Introduce AArch32 support for PSCI library #678
danh-arm
merged 19 commits into
ARM-software:integration
from
soby-mathew:sm/PSCI_AArch32
Aug 18, 2016
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This patch fixes the translation table library for wraparound cases. These cases are not expected to occur on AArch64 platforms because only the 48 bits of the 64 bit address space are used. But it is a possibility for AArch32 platforms. Change-Id: Ie7735f7ba2977019381e1c124800381471381499
This patch moves the various assembly console drivers into `aarch64` architecture specific folder. Stub files, which include files from new location, are retained at the original location for platform compatibility reasons. Change-Id: I0069b6c1c0489ca47f5204d4e26e3bc3def533a8
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base. Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3
This patch moves the assembly exclusive lock library code `spinlock.S` into architecture specific folder `aarch64`. A stub file which includes the file from new location is retained at the original location for compatibility. The BL makefiles are also modified to include the file from the new location. Change-Id: Ide0b601b79c439e390c3a017d93220a66be73543
This patch moves the macro SIZE_FROM_LOG2_WORDS() defined in `arch.h` to `utils.h` as it is utility macro. Change-Id: Ia8171a226978f053a1ee4037f80142c0a4d21430
This patch adds the essential AArch32 architecture helpers arch.h and arch_helpers.h and modifies `_types.h` to add AArch32 support. A new build option `ARCH` is defined in the top level makefile to enable the component makefiles to choose the right files based on the Architecture it is being build for. Depending on this flag, either `AARCH32` or `AARCH64` flag is defined by the Makefile. The default value of `ARCH` flag is `aarch64`. The AArch32 build support will be added in a later patch. Change-Id: I405e5fac02db828a55cd25989b572b64cb005241
This patch adds various assembly helpers for AArch32 like : * cache management : Functions to flush, invalidate and clean cache by MVA. Also helpers to do cache operations by set-way are also added. * stack management: Macros to declare stack and get the current stack corresponding to current CPU. * Misc: Macros to access co processor registers in AArch32, macros to define functions in assembly, assert macros, generic `do_panic()` implementation and function to zero block of memory. Change-Id: I7b78ca3f922c0eda39beb9786b7150e9193425be
This patch adds translation library supports for AArch32 platforms. The library only supports long descriptor formats for AArch32. The `enable_mmu_secure()` enables the MMU for secure world with `TTBR0` pointing to the populated translation tables. Change-Id: I061345b1779391d098e35e7fe0c76e3ebf850e08
The tf_printf library uses 64 bit division to print numbers in appropriate formats but AArch32 mode cannot do 64 bit division natively. Hence this patch adds additional number printing routines to handle AArch32 mode in tf_printf library. The decimal format printing capability is limited to 32 bit integers whereas 64 bits are supported in hexadecimal format. The library assumes that secure world is running in Little-Endian mode to do bit manipulations on 64 bit. Suitable assertions are present to enforce this assumption. Change-Id: I55a21e448cef4915d1834d76e48a84ccf0bec36d
This patch adds an API in runtime service framework to invoke the registered handler corresponding to the SMC function identifier. This is helpful for AArch32 because the number of arguments required by the handler is more than registers available as per AArch32 program calling conventions and requires the use of stack. Hence this new API will do the necessary argument setup and invoke the appropriate handler. Although this API is primarily intended for AArch32, it can be used for AArch64 as well. Change-Id: Iefa15947fe5a1df55b0859886e677446a0fd7241
This patch defines a SMCC context to save and restore registers during a SMC call. It also adds appropriate helpers to save and restore from this context for use by AArch32 secure payload and BL stages. Change-Id: I64c8d6fe1d6cac22e1f1f39ea1b54ee1b1b72248
This patch modifies GICv3 and TZC drivers to add AArch32 support. No modifications are required for the GICv2 driver for AArch32 support. The TZC driver assumes that the secure world is running in Little-Endian mode to do 64 bit manipulations. Assertions are present to validate the assumption. Note: The legacy GICv3 driver is not supported for AArch32. Change-Id: Id1bc75a9f5dafb9715c9500ca77b4606eb1e2458
This patch adds console drivers including the pl011 driver for the AArch32 mode. Change-Id: Ifd22520d370fca3e73dbbf6f2d97d6aee65b67dd
This patch adds AArch32 support to cpu ops, context management, per-cpu data and spinlock libraries. The `entrypoint_info` structure is modified to add support for AArch32 register arguments. The CPU operations for AEM generic cpu in AArch32 mode is also added. Change-Id: I1e52e79f498661d8f31f1e7b3a29e222bc7a4483
This patch adds AArch32 support to PSCI library, as follows : * The `psci_helpers.S` is implemented for AArch32. * AArch32 version of internal helper function `psci_get_ns_ep_info()` is defined. * The PSCI Library is responsible for the Non Secure context initialization. Hence a library interface `psci_prepare_next_non_secure_ctx()` is introduced to enable EL3 runtime firmware to initialize the non secure context without invoking context management library APIs. Change-Id: I25595b0cc2dbfdf39dbf7c589b875cba33317b9d
This patch adds a minimal AArch32 secure payload SP_MIN. It relies on PSCI library to initialize the normal world context. It runs in Monitor mode and uses the runtime service framework to handle SMCs. It is added as a BL32 component in the Trusted Firmware source tree. Change-Id: Icc04fa6b242025a769c1f6c7022fde19459c43e9
This patch adds AArch32 support for FVP and implements common platform APIs like `plat_get_my_stack`, `plat_set_my_stack`, `plat_my_core_cos` for AArch32. Only Multi Processor(MP) implementations of these functions are considered in this patch. The ARM Standard platform layer helpers are implemented for AArch32 and the common makefiles are modified to cater for both AArch64 and AArch32 builds. Compatibility with the deprecated platform API is not supported for AArch32. Change-Id: Iad228400613eec91abf731b49e21a15bcf2833ea
This patch implements the support for SP_MIN in FVP. The SP_MIN platform APIs are implemented and the required makefile support is added for FVP. Change-Id: Id50bd6093eccbd5e38894e3fd2b20d5baeac5452
This patch enables the AArch32 build including SP_MIN in the top level Makefile. The build flag `ARCH` now can specify either `aarch64`(default) or `aarch32`. Currently only FVP AEM model is supported for AArch32 build. Another new build flag `AARCH32_SP` is introduced to specify the AArch32 secure payload to be built. Change-Id: Ie1198cb9e52d7da1b79b93243338fc3868b08faa
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This patch stack introduces AArch32 support for PSCI library along with AArch32 port
of various supporting frameworks. A minimal AArch32 secure payload
SP_MIN
isalso implemented to demonstrate the integration with the PSCI library.