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Merge pull request #4510 from kegilbert/rearrange-odin-target-rebase
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u-blox rearrange ODIN target
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sg- committed Jun 15, 2017
2 parents f16ca56 + 6a270fb commit 226af54
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Showing 57 changed files with 9 additions and 20,699 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,9 @@ typedef enum {
ADC_3 = (int)ADC3_BASE
} ADCName;

typedef enum {
DAC_1 = (int)DAC_BASE
} DACName;

typedef enum {
UART_1 = (int)USART1_BASE,
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Original file line number Diff line number Diff line change
Expand Up @@ -734,11 +734,13 @@ void SystemInit_ExtMemCtl(void)
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;

/*-- FMC/FSMC Configuration --------------------------------------------------*/
/*-- FMC/FSMC Configuration --------------------------------------------------*/
/* Enable the FMC/FSMC interface clock */
RCC->AHB3ENR |= 0x00000001;

#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)

#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
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