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Merge pull request #9438 from c1728p9/qspi_update
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Use dedicated PinMap for each QSPI data line
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@0xc0170
0xc0170 committed Jan 23, 2019
2 parents 129889b + 82b131a commit a6509cf
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Showing 28 changed files with 441 additions and 196 deletions.
41 changes: 26 additions & 15 deletions targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/TARGET_FRDM/PeripheralPins.c
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Expand Up @@ -266,28 +266,39 @@ const PinMap PinMap_PWM[] = {
{NC , NC , 0}
};

const PinMap PinMap_QSPI_DATA[] = {
{PTE0, QSPI_0, 5},
{PTE2, QSPI_0, 5},
{PTE3, QSPI_0, 5},
{PTE4, QSPI_0, 5},
{PTE6, QSPI_0, 5},
{PTE7, QSPI_0, 5},
{PTE8, QSPI_0, 5},
{PTE9, QSPI_0, 5},
{PTE10, QSPI_0, 5},
{NC , NC , 0}
const PinMap PinMap_QSPI_DATA0[] = {
{PTE2, QSPI_0, 5}, // ALT5, QSPI0A_DATA0
{PTE8, QSPI_0, 5}, // ALT5, QSPI0B_DATA0
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA1[] = {
{PTE4, QSPI_0, 5}, // ALT5, QSPI0A_DATA1
{PTE10, QSPI_0, 5}, // ALT5, QSPI0B_DATA1
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA2[] = {
{PTE3, QSPI_0, 5}, // ALT5, QSPI0A_DATA2
{PTE9, QSPI_0, 5}, // ALT5, QSPI0B_DATA2
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA3[] = {
{PTE0, QSPI_0, 5}, // ALT5, QSPI0A_DATA3
{PTE6, QSPI_0, 5}, // ALT5, QSPI0B_DATA3
{NC, NC, 0}
};

const PinMap PinMap_QSPI_SCLK[] = {
{PTE1, QSPI_0, 5},
{PTE7, QSPI_0, 5},
{PTE1, QSPI_0, 5}, // ALT5, QSPI0A_SCLK
{PTE7, QSPI_0, 5}, // ALT5, QSPI0B_SCLK
{NC , NC , 0}
};

const PinMap PinMap_QSPI_SSEL[] = {
{PTE5, QSPI_0, 5},
{PTE11, QSPI_0, 5},
{PTE5, QSPI_0, 5}, // ALT5, QSPI0A_SS0_B
{PTE11, QSPI_0, 5}, // ALT5, QSPI0B_SS0_B
{NC , NC , 0}
};

41 changes: 26 additions & 15 deletions targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/TARGET_FRDM/PeripheralPins.c
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Expand Up @@ -158,28 +158,39 @@ const PinMap PinMap_PWM[] = {
{NC , NC , 0}
};

const PinMap PinMap_QSPI_DATA[] = {
{PTE0, QSPI_0, 5},
{PTE2, QSPI_0, 5},
{PTE3, QSPI_0, 5},
{PTE4, QSPI_0, 5},
{PTE6, QSPI_0, 5},
{PTE7, QSPI_0, 5},
{PTE8, QSPI_0, 5},
{PTE9, QSPI_0, 5},
{PTE10, QSPI_0, 5},
{NC , NC , 0}
const PinMap PinMap_QSPI_DATA0[] = {
{PTE2, QSPI_0, 5}, // ALT5, QSPI0A_DATA0
{PTE8, QSPI_0, 5}, // ALT5, QSPI0B_DATA0
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA1[] = {
{PTE4, QSPI_0, 5}, // ALT5, QSPI0A_DATA1
{PTE10, QSPI_0, 5}, // ALT5, QSPI0B_DATA1
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA2[] = {
{PTE3, QSPI_0, 5}, // ALT5, QSPI0A_DATA2
{PTE9, QSPI_0, 5}, // ALT5, QSPI0B_DATA2
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA3[] = {
{PTE0, QSPI_0, 5}, // ALT5, QSPI0A_DATA3
{PTE6, QSPI_0, 5}, // ALT5, QSPI0B_DATA3
{NC, NC, 0}
};

const PinMap PinMap_QSPI_SCLK[] = {
{PTE1, QSPI_0, 5},
{PTE7, QSPI_0, 5},
{PTE1, QSPI_0, 5}, // ALT5, QSPI0A_SCLK
{PTE7, QSPI_0, 5}, // ALT5, QSPI0B_SCLK
{NC , NC , 0}
};

const PinMap PinMap_QSPI_SSEL[] = {
{PTE5, QSPI_0, 5},
{PTE11, QSPI_0, 5},
{PTE5, QSPI_0, 5}, // ALT5, QSPI0A_SS0_B
{PTE11, QSPI_0, 5}, // ALT5, QSPI0B_SS0_B
{NC , NC , 0}
};

5 changes: 4 additions & 1 deletion targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/PeripheralPins.h
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Expand Up @@ -49,7 +49,10 @@ extern const PinMap PinMap_PWM[];

#if DEVICE_QSPI
/************QSPI***************/
extern const PinMap PinMap_QSPI_DATA[];
extern const PinMap PinMap_QSPI_DATA0[];
extern const PinMap PinMap_QSPI_DATA1[];
extern const PinMap PinMap_QSPI_DATA2[];
extern const PinMap PinMap_QSPI_DATA3[];
extern const PinMap PinMap_QSPI_SCLK[];
extern const PinMap PinMap_QSPI_SSEL[];
#endif
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16 changes: 8 additions & 8 deletions targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/api/qspi_api.c
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Expand Up @@ -52,10 +52,10 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
uint32_t clockSourceFreq = 0;
qspi_config_t config = {0};

uint32_t qspiio0name = pinmap_peripheral(io0, PinMap_QSPI_DATA);
uint32_t qspiio1name = pinmap_peripheral(io1, PinMap_QSPI_DATA);
uint32_t qspiio2name = pinmap_peripheral(io2, PinMap_QSPI_DATA);
uint32_t qspiio3name = pinmap_peripheral(io3, PinMap_QSPI_DATA);
uint32_t qspiio0name = pinmap_peripheral(io0, PinMap_QSPI_DATA0);
uint32_t qspiio1name = pinmap_peripheral(io1, PinMap_QSPI_DATA1);
uint32_t qspiio2name = pinmap_peripheral(io2, PinMap_QSPI_DATA2);
uint32_t qspiio3name = pinmap_peripheral(io3, PinMap_QSPI_DATA3);
uint32_t qspiclkname = pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
uint32_t qspisselname = pinmap_peripheral(ssel, PinMap_QSPI_SSEL);

Expand Down Expand Up @@ -89,10 +89,10 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN

qspi_frequency(obj, hz);

pinmap_pinout(io0, PinMap_QSPI_DATA);
pinmap_pinout(io1, PinMap_QSPI_DATA);
pinmap_pinout(io2, PinMap_QSPI_DATA);
pinmap_pinout(io3, PinMap_QSPI_DATA);
pinmap_pinout(io0, PinMap_QSPI_DATA0);
pinmap_pinout(io1, PinMap_QSPI_DATA1);
pinmap_pinout(io2, PinMap_QSPI_DATA2);
pinmap_pinout(io3, PinMap_QSPI_DATA3);

pinmap_pinout(sclk, PinMap_QSPI_SCLK);
pinmap_pinout(ssel, PinMap_QSPI_SSEL);
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5 changes: 4 additions & 1 deletion targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/PeripheralPins.h
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Expand Up @@ -52,7 +52,10 @@ extern const PinMap PinMap_PWM[];

#if DEVICE_QSPI
/************QSPI***************/
extern const PinMap PinMap_QSPI_DATA[];
extern const PinMap PinMap_QSPI_DATA0[];
extern const PinMap PinMap_QSPI_DATA1[];
extern const PinMap PinMap_QSPI_DATA2[];
extern const PinMap PinMap_QSPI_DATA3[];
extern const PinMap PinMap_QSPI_SCLK[];
extern const PinMap PinMap_QSPI_SSEL[];
#endif
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16 changes: 8 additions & 8 deletions targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/qspi_api.c
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Expand Up @@ -43,10 +43,10 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
{
spifi_config_t config = {0};

uint32_t qspiio0name = pinmap_peripheral(io0, PinMap_QSPI_DATA);
uint32_t qspiio1name = pinmap_peripheral(io1, PinMap_QSPI_DATA);
uint32_t qspiio2name = pinmap_peripheral(io2, PinMap_QSPI_DATA);
uint32_t qspiio3name = pinmap_peripheral(io3, PinMap_QSPI_DATA);
uint32_t qspiio0name = pinmap_peripheral(io0, PinMap_QSPI_DATA0);
uint32_t qspiio1name = pinmap_peripheral(io1, PinMap_QSPI_DATA1);
uint32_t qspiio2name = pinmap_peripheral(io2, PinMap_QSPI_DATA2);
uint32_t qspiio3name = pinmap_peripheral(io3, PinMap_QSPI_DATA3);
uint32_t qspiclkname = pinmap_peripheral(sclk, PinMap_QSPI_SCLK);
uint32_t qspisselname = pinmap_peripheral(ssel, PinMap_QSPI_SSEL);

Expand All @@ -70,10 +70,10 @@ qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinN
// tested all combinations, take first
obj->instance = qspi_data_first;

pinmap_pinout(io0, PinMap_QSPI_DATA);
pinmap_pinout(io1, PinMap_QSPI_DATA);
pinmap_pinout(io2, PinMap_QSPI_DATA);
pinmap_pinout(io3, PinMap_QSPI_DATA);
pinmap_pinout(io0, PinMap_QSPI_DATA0);
pinmap_pinout(io1, PinMap_QSPI_DATA1);
pinmap_pinout(io2, PinMap_QSPI_DATA2);
pinmap_pinout(io3, PinMap_QSPI_DATA3);

pinmap_pinout(sclk, PinMap_QSPI_SCLK);
pinmap_pinout(ssel, PinMap_QSPI_SSEL);
Expand Down
17 changes: 15 additions & 2 deletions .../TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/TARGET_LPCXpresso/PeripheralPins.c
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Expand Up @@ -117,12 +117,25 @@ const PinMap PinMap_PWM[] = {
};

/************QSPI***************/
const PinMap PinMap_QSPI_DATA[] = {

const PinMap PinMap_QSPI_DATA0[] = {
{P0_24, QSPI_0, 6},
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA1[] = {
{P0_25, QSPI_0, 6},
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA2[] = {
{P0_28, QSPI_0, 6},
{NC, NC, 0}
};

const PinMap PinMap_QSPI_DATA3[] = {
{P0_27, QSPI_0, 6},
{NC , NC , 0}
{NC, NC, 0}
};
const PinMap PinMap_QSPI_SCLK[] = {
{P0_26, QSPI_0, 6},
Expand Down
5 changes: 4 additions & 1 deletion targets/TARGET_STM/PeripheralPins.h
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Expand Up @@ -81,7 +81,10 @@ extern const PinMap PinMap_CAN_TD[];
#endif

#if DEVICE_QSPI
extern const PinMap PinMap_QSPI_DATA[];
extern const PinMap PinMap_QSPI_DATA0[];
extern const PinMap PinMap_QSPI_DATA1[];
extern const PinMap PinMap_QSPI_DATA2[];
extern const PinMap PinMap_QSPI_DATA3[];
extern const PinMap PinMap_QSPI_SCLK[];
extern const PinMap PinMap_QSPI_SSEL[];
#endif
Expand Down
30 changes: 20 additions & 10 deletions targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralPins.c
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Expand Up @@ -350,21 +350,31 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {

//*** QUADSPI ***

MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1
{PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN]
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{NC, NC, 0}
};

Expand Down
30 changes: 20 additions & 10 deletions targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/PeripheralPins.c
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Expand Up @@ -402,21 +402,31 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {

//*** QUADSPI ***

MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to ARD_A1
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to ARD_D4
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to SD_D0
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0 // Connected to SD_D1
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1 // Connected to SD_D2
{PD_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0 // Connected to PSRAM_A16 [IS66WV51216EBLL_A16]
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0 // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1 // Connected to SD_D2
{PD_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1 // Connected to PSRAM_A17 [IS66WV51216EBLL_A17]
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1 // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to SD_D0
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to QSPI_BK1_IO2 [N25Q128A13EF840F_DQ2]
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to ARD_D0
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2 // Connected to ARD_D1
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0 // Connected to QSPI_BK1_IO0 [N25Q128A13EF840F_DQ0]
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1 // Connected to QSPI_BK1_IO1 [N25Q128A13EF840F_DQ1]
{PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to QSPI_BK1_NCS [N25Q128A13EF840F_S]
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to ARD_A1
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to QSPI_BK1_IO3 [N25Q128A13EF840F_DQ3]
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3 // Connected to ARD_D0
{NC, NC, 0}
};

Expand Down
30 changes: 20 additions & 10 deletions targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/PeripheralPins.c
View file
Expand Up @@ -402,21 +402,31 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {

//*** QUADSPI ***

MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
{PC_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO2
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO0
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_IO1
{PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS // Connected to USB_PowerSwitchOn [STMPS2151STR_EN]
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{NC, NC, 0}
};

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17 changes: 14 additions & 3 deletions targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/PeripheralPins.c
View file
Expand Up @@ -312,14 +312,25 @@ MBED_WEAK const PinMap PinMap_CAN_TD[] = {

//*** QUADSPI ***

MBED_WEAK const PinMap PinMap_QSPI_DATA[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QSPI)}, // QUADSPI_BK1_NCS
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO0
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO1
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_BK1_IO3
{NC, NC, 0}
};

MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
{PB_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QSPI)}, // QUADSPI_CLK
{NC, NC, 0}
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