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COMPONENT_FPGA_CI_TEST_SHIELD: better debug print #13768
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@jeromecoutant, thank you for your changes. |
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What does this do better ? I can see multiple smaller changes here.
@@ -215,9 +217,11 @@ template<typename PortType, typename FunctionType, FunctionType f> | |||
void test_peripheral(PortType &port) | |||
{ | |||
if (port.empty()) { | |||
utest_printf("%d - Could not find pins to test peripheral\n", port.peripheral); | |||
if (port.peripheral != NC) { |
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shouldn't port.empty() already do the trick do we need additional if here? If yes, lets move it to line 219 (condtion && condition)
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No, as the following else is valid only for the first condition
Yes, these prints are the one I (we...) need to work effectively with FPGA |
CI started |
Jenkins CI Test : ❌ FAILEDBuild Number: 1 | 🔒 Jenkins CI Job | 🌐 Logs & ArtifactsCLICK for Detailed Summary
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CI started |
Jenkins CI Test : ✔️ SUCCESSBuild Number: 2 | 🔒 Jenkins CI Job | 🌐 Logs & ArtifactsCLICK for Detailed Summary
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Summary of changes
Here is few updates in COMPONENT_FPGA_CI_TEST_SHIELD print console,
that helps user to debug.
Thx
Impact of changes
Migration actions required
Documentation
Pull request type
Test results
FPGA tests verified with DISCO L475
Reviewers