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This is RISC-V 32-BIT Processor implementation repository which is built on LOGISIM.

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RISC_V_32_BIT_implementation_on_LOGISIM

Introduction

The fusion of hardware and software lies at the heart of computing. Delving into this intricate relationship, I embarked on a captivating project: implementing a RISC-V 32-bit processor using Logisim. This essay encapsulates the insights gained from this educational odyssey, shedding light on the mechanics of modern computing.

RISC-V: An Open-Source Revelation

The RISC-V architecture's modularity and openness have revolutionized instruction set designs. Originating from UC Berkeley, it empowers customization and innovation across diverse applications. Implementing RISC-V not only unravels instruction formats and addressing modes but also demystifies the core of computer architecture.

Logisim:

Logisim's graphical interface bridged the abstract with the tangible, making digital circuits come alive. This user-friendly tool offered a dynamic platform to explore processor internals, fostering a deep understanding of design principles.

RISC V

Building Blocks of Implementation

1. Instruction Fetch (IF): Fetching instructions using the program counter initiated the journey.
2. Instruction Decode (ID): Decoding instructions into components clarified their functions.
3. Execution (EX): ALU operations and handling branches demonstrated the heart of computation.
4. Memory Access (MEM): Load and store operations highlighted memory interactions.
5. Write Back (WB): Writing results back to registers concluded the cycle.

Key Points

Pipelining: Overlapping instructions through pipelining showcased efficiency while managing hazards.
Control Unit: Orchestrating instruction flow via the control unit demonstrated its pivotal role.
Instruction Sets: Implementing RISC-V instructions enhanced understanding of assembly languages.

Conclusion:

In conclusion, the Logisim-based implementation of a RISC-V processor unraveled the intricate dance between hardware and software. This project illuminated the path from abstract concepts to tangible execution, enriching comprehension of computer architecture's depths. As we navigate the digital age, delving into processor design becomes a crucial pursuit, and RISC-V on Logisim offers an enlightening gateway to this realm.

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This is RISC-V 32-BIT Processor implementation repository which is built on LOGISIM.

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