This repository contains my digital system design projects. Each folder contains the problem statement and the reports for the projects. The hardware description language used is System Verilog.
-
Notifications
You must be signed in to change notification settings - Fork 1
This repository contains my digital system design projects. Each folder contains the problem statement and the reports for the projects. The hardware description language used is System Verilog.
AishwaryaGandhi/Advanced-Digital-System-Design-Generation
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
This repository contains my digital system design projects. Each folder contains the problem statement and the reports for the projects. The hardware description language used is System Verilog.
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published