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This rep contains neighbour's cpu. Single-cycle / Multi-cycle CPU implementation in vhdl using ISE Xiling

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Asterinos1/Neighbour-s-CPU-v2

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Welcome to neighbour's cpu also known as Computer Organization and Design (2024)

This rep contains the assingments for Computer Organization and Design course at TUC. by Poler and Asterinos

Part 0 (50 points - Bonus)

A memory block with a simple controller for reading and writing

Part 1 (300 points)

The official single-cycle CPU for neighbour's pc with 1 kb ram/rom

Part 2 (200 points)

Conversion from single-cycle to multi-cycle CPU

Part 3 (200 points)

Pipeline desing (WIP)

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This rep contains neighbour's cpu. Single-cycle / Multi-cycle CPU implementation in vhdl using ISE Xiling

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