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support the IPS 1.3" ST7789 with CS pin to ground? #163

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Nulista opened this issue Jun 18, 2018 · 20 comments
Closed

support the IPS 1.3" ST7789 with CS pin to ground? #163

Nulista opened this issue Jun 18, 2018 · 20 comments

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@Bodmer
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Bodmer commented Jul 6, 2018

I have added support for that board.

It is a bit odd, but SPI mode 3 must be used when the chip select is not used. Other displays use SPI mode 0

@Bodmer Bodmer closed this as completed Jul 6, 2018
@Nulista
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Nulista commented Jul 7, 2018 via email

@RafaelMatosRv
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Hello friend could share your library with me? I have the same problem

@Bodmer
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Bodmer commented Aug 31, 2018

The library supports the ST7789 with chip select held low. Use the Setup18_ST7789.h

@RafaelMatosRv
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RafaelMatosRv commented Sep 1, 2018

I m using Esp 32, is correct?

Setup18_ST7789.h

#define TFT_MISO 19
#define TFT_MOSI 23
#define TFT_SCLK 18
#define TFT_CS LOW // Chip select control pin
#define TFT_DC 2 // Data Command control pin
#define TFT_RST 4

@Bodmer
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Bodmer commented Sep 1, 2018

Comment out the chip select define thus:

//#define TFT_CS

@garyinbg
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I'm just going to go and try this, well on Monday anyway :)
Thanks in advance Bodmer. :)

Can I just ask why SPI mode 3 please

@Bodmer
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Bodmer commented Feb 25, 2019

Some displays with the ST7789 controller have CS wired low and these only work with mode 3 for some reason.

@garyinbg
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Ok, many thanks for the reply :)

@tablatronix
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Does this mean these displays cannot share spi with other devices?

@Bodmer
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Bodmer commented Jul 26, 2019

Yes, one way around this is to add additional circuitry to, for example, block the SPI clock line (SCK) to the TFT when another device is selected.

@tablatronix
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Thats a good idea, I was just messing around trying to find some solution.

@Bodmer
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Bodmer commented Jul 27, 2019

A gotcha... The ST7789 is unusual, it is operated in SPI Mode 3, so the SCK line must be driven high when you do not wish to communicate with the TFT, otherwise an extra clock pulse will be introduced and that will mess up the next command.

@tablatronix
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I had some other issues with this module, I could not use esp8266 reset, I had to use a IO for rst, and one that did not output on startup, might have something to do with the spi mode3 also

@Bodmer
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Bodmer commented Jul 29, 2019

I think the problem could be:

  1. When using the power on reset the TFT pins are floating thereafter until the code boots and sets them into a defined state. During the hiatus period the TFT sees garbage commands and clock pulses and appears to "lock up". Subsequently it does not accept commands, probably because there has not been a multiple of 8 clock pulses so the commands are all bit shifted. Normally the CS line will re-sync the shift register to the 8 clock pulse sequence.

or:

  1. The reset pulse is too short so it does not meet the display data sheet timing values causing the display to not initialize correctly.

I always use a pin to drive the reset line on displays that have CS tied low.

@tablatronix
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tablatronix commented Jul 29, 2019

2 is my suspect, I have been testing on my logic analyzer just to better understand it, I have seen some people implement an autoreset circuitry, I am trying to find more info about that.

I also lifted the CS trace and added my own cs tap, it makes the display much more useful

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DA5FECEC-3DA2-4720-9781-8FC2356F3CE1

@garyinbg
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garyinbg commented Jul 29, 2019 via email

@Bodmer
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Bodmer commented Jul 29, 2019

I connected up an ST7789 display to a NodeMCU board and used the RST line as the reset source with the DC line from the display to pin D3 (GPIO 0), when powered up the TFT failed to initialise. Pressing the reset button also failed to initialise the display indicating the issue is not the length of the reset pulse. This leaves spurious SPI clock pulses as a potential culprit.

To stabilise the SPI clock line before the software has booted up I added a 10K pullup from VCC (3V3) to the SCK line and the display still failed to initialise. I changed to a 10K pull down on the SCK line and the display ran fine when pressing the reset button, it also booted and ran fine when the NodeMCU is powered up with a DC supply.

This setup did fail at startup when plugged into a PC for the first time as soon as the PC enumerates the COM port to the NodeMCU. Moving the TFT DC line to the NodeMCU pin D1 fixed this. This is possibly due to the dual functionality of D3 (GPIO 0) for the ESP8266 during boot.

So in summary to use the RST line from the NodeMCU I found:

  1. A pull down (e.g. 10K) must be fitted to the TFT SCK line.
  2. Do not use D3 (GPIO 0) for the DC line

With this setup the display worked reliably using the hardware RST line. If this also works for you then I am interested to know if this is a general fix for these tied down CS displays.

@tablatronix
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I will test, I did have to move dc around on another display I will check a few , ones that do not pulse on boot especially

Repository owner deleted a comment from garyinbg Jul 31, 2019
Repository owner deleted a comment from garyinbg Jul 31, 2019
@tablatronix
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tablatronix commented Aug 4, 2019

I can confirm the sck pulldown works with RST, I am not having an issue with D3 DC but it might be unique to vcc or something, probably wise to avoid it still, I will keep testing it for a bit.

I will check other esp boards for RST issues, not just nodemcu in a bit

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