Added:

slland: 348 cycles
sllor: 348 cycles
sllxor: 381 cycles
sllnot: 158 cycles
sllcmpu: 210 cycles
sllcmpzero: 45 cycles
sllshl: varies
sllshru: varies
sllshrs: varies
sllmulu: 1592 cycles

Fixed interrupt issue and optimized to 108 cycles

No longer backs up alt registers. Disables interrupts during the routine.

Updated documentation and made a very minor optimization

Comparison of de to 0 simplified to comparison of de to hl

Interrupt enabling and disabling now handled conditionally

Now uses ude:uhl for minor shifts instead of uiy:uhl. Now uses stack for large shifts

Condensed routines. Eliminated most of sllshru. Fixed a bug where shifting 0 would cause a shift of 256.

Added slldvrmu for 48 bit unsigned division and modulo (~6000 cycles). This is called from the slldivu and sllremu which are in one file as they share cleanup behavior.

Updated file names and documentation to use i48 instead of sll

i48cmpu has been changed to the old commented out version which doesn't use arguments off stack. Also minor optimization.

Removed multiple stack uses, now about 100 cycles

Changed i48dvrmu to put remainder in uiy:ubc rather than on the stack. i48dvrmu now restores interrupts and fully cleans up rather than partially relying on i48divu and i48remu.

Added i48cmps for signed int48_t comparison. 105 cycles.

Added i48bitrev, i48bswap, i48ctlz, i48popcnt. Significant optimization on i48bitrev and i48bswap may be possible. i48bitrev just does ibitrev twice without restoring af until the end, but an entirely new approach may perform better.  i48bswap could be improved by using sp directly to manipulate stack values rather than hl (as lbswap does), but I was warned against doing this on prior routines.

Switched the order of register comparison so that routine outputs a sign flag matching the sign of the number.

i48neg contains routines for getting the negative of both uhl:ude and uiy:ubc. Signed division and remainder are about 10-500 more cycles than unsigned.

Cycles per loop is now 52 instead of 143. Base cost is slightly higher however (80 --> 279 cycles).

Removed backing up alt registers from i48dvrmu because based on other examples, they don't seem to need to be backed up. Streamlined other routines by reducing the amount of jumps used.