The purpose of this project was the design and implementation on FPGA of a circuit that has two modes of operation. Based on the value of a signal that determines the mode of operation, which is provided by the user, it computes a polynomial or a sum of products in 2's comlement. For the needs of this project, Matlab, Modelsim software and VHDL language were used for the design of this circuit. The circuit was implemented and verified on FPGA Xilinx Spartan-3E Starter Kit.For better performace of the hardware implementation, iterative decomposition rule was used.
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