Enable RISC-V atomic compare and swap

Centril · Jan 26, 2019 · 607c543 · 607c543
1 parent 74ff7dc
commit 607c543
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs b/src/librustc_target/spec/riscv32imac_unknown_none_elf.rs
@@ -28,7 +28,7 @@ pub fn target() -> TargetResult {
             linker: Some("rust-lld".to_string()),
             cpu: "generic-rv32".to_string(),
             max_atomic_width: Some(32),
-            atomic_cas: false, // incomplete +a extension
+            atomic_cas: true,
             features: "+m,+a,+c".to_string(),
             executables: true,
             panic_strategy: PanicStrategy::Abort,