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Merge pull request #1527 from NZJenkins/WalkIndexBuffer-SIMD
Add SSE WalkIndexBuffer implementation
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,57 @@ | ||
| // https://stackoverflow.com/questions/1666093/cpuid-implementations-in-c | ||
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| #ifndef CPUID_H | ||
| #define CPUID_H | ||
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| #ifdef _WIN32 | ||
| #include <limits.h> | ||
| #include <intrin.h> | ||
| #include <bitset> | ||
| typedef unsigned __int32 uint32_t; | ||
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| #else | ||
| #include <stdint.h> | ||
| #endif | ||
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| class CPUID { | ||
| uint32_t regs[4]; | ||
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| public: | ||
| explicit CPUID(unsigned i) { | ||
| #ifdef _WIN32 | ||
| __cpuid((int *)regs, (int)i); | ||
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| #else | ||
| asm volatile | ||
| ("cpuid" : "=a" (regs[0]), "=b" (regs[1]), "=c" (regs[2]), "=d" (regs[3]) | ||
| : "a" (i), "c" (0)); | ||
| // ECX is set to zero for CPUID function 4 | ||
| #endif | ||
| } | ||
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| const std::bitset<32> &EAX() const { return regs[0]; } | ||
| const std::bitset<32> &EBX() const { return regs[1]; } | ||
| const std::bitset<32> &ECX() const { return regs[2]; } | ||
| const std::bitset<32> &EDX() const { return regs[3]; } | ||
| }; | ||
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| class SimdCaps { | ||
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| public: | ||
| const bool SSE(void) { return f_1.EDX()[25]; } | ||
| const bool SSE2(void) { return f_1.EDX()[26]; } | ||
| const bool SSE3(void) { return f_1.ECX()[0]; } | ||
| const bool SSSE3(void) { return f_1.ECX()[9]; } | ||
| const bool SSE41(void) { return f_1.ECX()[19]; } | ||
| const bool SSE42(void) { return f_1.ECX()[20]; } | ||
| const bool AVX(void) { return f_1.ECX()[1]; } | ||
| const bool AVX2(void) { return f_7.EBX()[5]; } | ||
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| private: | ||
| const CPUID f_1 = CPUID(1); | ||
| const CPUID f_7 = CPUID(7); | ||
| }; | ||
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| static SimdCaps bob; | ||
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| #endif // CPUID_H |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,92 @@ | ||
| //#include <mmintrin.h> // - MMX | ||
| //#include <xmmintrin.h> // SSE | ||
| //#include <emmintrin.h> // SSE2 | ||
| //#include <pmmintrin.h> // SSE3 | ||
| #include <smmintrin.h> // SSE4.1 | ||
| //#include <nmmintrin.h> // SSE4.2 | ||
| //#include <immintrin.h> // AVX | ||
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| #include "core\kernel\support\Emu.h" | ||
| #include "core\kernel\support\EmuXTL.h" | ||
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| #include "common\util\CPUID.h" | ||
| #include "WalkIndexBuffer.h" | ||
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| void WalkIndexBuffer_SSE41(XTL::INDEX16 & LowIndex, XTL::INDEX16 & HighIndex, XTL::INDEX16 * pIndexData, DWORD dwIndexCount); | ||
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| void Init_SIMD | ||
| ( | ||
| XTL::INDEX16 &LowIndex, | ||
| XTL::INDEX16 &HighIndex, | ||
| XTL::INDEX16 *pIndexData, | ||
| DWORD dwIndexCount | ||
| ) | ||
| { | ||
| SimdCaps supports; | ||
| if (supports.SSE41()) | ||
| WalkIndexBuffer_SIMD = WalkIndexBuffer_SSE41; | ||
| else | ||
| WalkIndexBuffer_SIMD = WalkIndexBuffer; | ||
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| WalkIndexBuffer_SIMD(LowIndex, HighIndex, pIndexData, dwIndexCount); | ||
| } | ||
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| void WalkIndexBuffer(XTL::INDEX16 & LowIndex, XTL::INDEX16 & HighIndex, XTL::INDEX16 * pIndexData, DWORD dwIndexCount) | ||
| { | ||
| // Determine highest and lowest index in use | ||
| LowIndex = pIndexData[0]; | ||
| HighIndex = LowIndex; | ||
| for (uint i = 1; i < dwIndexCount; i++) { | ||
| XTL::INDEX16 Index = pIndexData[i]; | ||
| if (LowIndex > Index) | ||
| LowIndex = Index; | ||
| if (HighIndex < Index) | ||
| HighIndex = Index; | ||
| } | ||
| } | ||
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| void WalkIndexBuffer_SSE41(XTL::INDEX16 & LowIndex, XTL::INDEX16 & HighIndex, XTL::INDEX16 * pIndexData, DWORD dwIndexCount) | ||
| { | ||
| // We can fit 8 ushorts into 128 bit SIMD registers | ||
| int iterations = dwIndexCount / 8; | ||
| DWORD remainder = dwIndexCount % 8; | ||
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| // Fallback to basic function if we can't even min / max 2 registers together | ||
| if (iterations < 2) { | ||
| WalkIndexBuffer(LowIndex, HighIndex, pIndexData, dwIndexCount); | ||
| return; | ||
| } | ||
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| __m128i *unalignedIndices = (__m128i*) pIndexData;\ | ||
| __m128i min = _mm_set1_epi16(USHRT_MAX); | ||
| __m128i max = _mm_setzero_si128(); | ||
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| // Min / max over index data | ||
| for (int i = 0; i < iterations; i++) { | ||
| __m128i indices = _mm_loadu_si128(&unalignedIndices[i]); | ||
| min = _mm_min_epu16(indices, min); | ||
| max = _mm_max_epu16(indices, max); | ||
| } | ||
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| // horizontal min | ||
| min = _mm_minpos_epu16(min); | ||
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| // horizontal max (using minpos) | ||
| max = _mm_subs_epu16(_mm_set1_epi16(USHRT_MAX), max); //invert | ||
| max = _mm_minpos_epu16(max); | ||
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| // Get the min and max out | ||
| LowIndex = (XTL::INDEX16) _mm_cvtsi128_si32(min); | ||
| HighIndex = (XTL::INDEX16) USHRT_MAX - _mm_cvtsi128_si32(max); | ||
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| // Compare with the remaining values that didn't fit neatly into the SIMD registers | ||
| for (DWORD i = dwIndexCount - remainder; i < dwIndexCount; i++) { | ||
| if (pIndexData[i] < LowIndex) | ||
| LowIndex = pIndexData[i]; | ||
| else if (pIndexData[i] > HighIndex) | ||
| HighIndex = pIndexData[i]; | ||
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| } | ||
| } | ||
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| // TODO AVX2, AVX512 |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,33 @@ | ||
| #ifndef WALKINDEXBUFFER_H | ||
| #define WALKINDEXBUFFER_H | ||
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| #include "core\kernel\support\Emu.h" | ||
| #include "core\kernel\support\EmuXTL.h" | ||
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| void WalkIndexBuffer | ||
| ( | ||
| XTL::INDEX16 &LowIndex, | ||
| XTL::INDEX16 &HighIndex, | ||
| XTL::INDEX16 *pIndexData, | ||
| DWORD dwIndexCount | ||
| ); | ||
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| void Init_SIMD | ||
| ( | ||
| XTL::INDEX16 &LowIndex, | ||
| XTL::INDEX16 &HighIndex, | ||
| XTL::INDEX16 *pIndexData, | ||
| DWORD dwIndexCount | ||
| ); | ||
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| static void(*WalkIndexBuffer_SIMD) | ||
| ( | ||
| XTL::INDEX16 &LowIndex, | ||
| XTL::INDEX16 &HighIndex, | ||
| XTL::INDEX16 *pIndexData, | ||
| DWORD dwIndexCount | ||
| ) = Init_SIMD; | ||
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| #endif |