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Fix overclock bug causing panics
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hador committed Jan 16, 2012
1 parent 087612e commit 601b7f6
Showing 1 changed file with 10 additions and 7 deletions.
17 changes: 10 additions & 7 deletions arch/arm/mach-msm/acpuclock.c
Original file line number Diff line number Diff line change
Expand Up @@ -450,13 +450,6 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s)
writel(hunt_s->a11clk_khz/19200, PLLn_L_VAL(0));
cpu_relax();
udelay(50);
} else if (hunt_s->pll == ACPU_PLL_0) {
if ((readl(PLLn_L_VAL(0)) & 0x3f) != PLL_960_MHZ) {
/* Restore PLL0 to standard config */
writel(PLL_960_MHZ, PLLn_L_VAL(0));
}
cpu_relax();
udelay(50);
}
#endif
/* CLK_SEL_SRC1NO */
Expand Down Expand Up @@ -487,6 +480,16 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s)
reg_clksel ^= 1;
writel(reg_clksel, A11S_CLK_SEL_ADDR);

#ifdef CONFIG_MSM7X27_OVERCLOCK
if (hunt_s->pll == ACPU_PLL_0 && hunt_s->a11clk_khz <= 600000) {
if ((readl(PLLn_L_VAL(0)) & 0x3f) != PLL_960_MHZ) {
/* Restore PLL0 to standard config */
writel(PLL_960_MHZ, PLLn_L_VAL(0));
}
cpu_relax();
udelay(50);
}
#endif
/*
* If the new clock divider is lower than the previous, then
* program the divider after switching the clock
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