Fix #146 - prevent duplicate global and local named type declarations

compiler/stages/src/main/scala/dfhdl/compiler/stages/vhdl/VHDLOwnerPrinter.scala

@@ -78,11 +78,15 @@ protected trait VHDLOwnerPrinter extends AbstractOwnerPrinter:
           if (vectorsConvUsed.contains(tpName)) DclScope.ArchBody else DclScope.TypeOnly
         tpName -> printer.csDFVectorDclsLocal(dclScope)(tpName, depth)
       })
+    val globalNamedDFTypes = getSet.designDB.getGlobalNamedDFTypes
     // collect the local named types, including vectors
     val namedDFTypes = ListSet.from(getSet.designDB.designMemberTable(design).view.collect {
       case localVar @ DclVar()     => localVar.dfType
       case localConst @ DclConst() => localConst.dfType
-    }.flatMap(_.decompose { case dt: (DFVector | NamedDFType) => dt }))
+    }.flatMap(_.decompose[DFVector | NamedDFType] {
+      case dt: DFVector                                        => dt
+      case dt: NamedDFType if !globalNamedDFTypes.contains(dt) => dt
+    }))
     // declarations of the types and relevant functions
     val namedTypeConvFuncsDcl = namedDFTypes.view
       .flatMap {

compiler/stages/src/test/scala/StagesSpec/PrintVHDLCodeSpec.scala

@@ -560,12 +560,6 @@ class PrintVHDLCodeSpec extends StageSpec:
          |end Example;
          |
          |architecture Example_arch of Example is
-         |
-         |  subtype t_opaque_Foo is t_vecX2_std_logic_vector(0 to 10 - 1)(0 to 16 - 1)(11 downto 0);
-         |  function to_t_opaque_Foo(A : std_logic_vector) return t_opaque_Foo is
-         |  begin
-         |    return to_t_vecX2_std_logic_vector(A, 10, 16, 12);
-         |  end;
          |  signal y_din : t_opaque_Foo;
          |begin
          |  process (all)

lib/src/test/scala/issues/IssueSpec.scala

@@ -79,4 +79,7 @@ class IssuesSpec extends FunSuite:
   test("i142 compiles and passes VHDL linting"):
     given options.CompilerOptions.Backend = backends.vhdl
     i142.IntegerIndexingIssue().compile.lint
+  test("i146 compiles and passes VHDL linting"):
+    given options.CompilerOptions.Backend = backends.vhdl.v2008
+    i146.DoubleStructDecl().compile.lint
 end IssuesSpec

lib/src/test/scala/issues/i146.scala

@@ -0,0 +1,14 @@
+// format: off
+package issues.i146
+
+import dfhdl.*
+
+case class InStruct (
+    a : Bit <> VAL,
+    b : Bit <> VAL
+) extends Struct
+
+class DoubleStructDecl() extends RTDesign():
+    val sin = InStruct <> IN
+    val svar = InStruct <> VAR
+    svar := sin