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Hardware Information

Decatf edited this page May 29, 2018 · 6 revisions
Peripheral Type Hardware Mainline Driver
Analog Digital Converter stmpe811 P
Audio wm8994 P
Battery max17042 Y
Camera
- front s5k5ccgx N
- back s5k6bbgx N
Charger unknown N
CPU Temperature Sensor nct1008 Y
Display Panel cmc623 N
GPS bcm4751 N
GPU tegra host1x Y
HDMI Connector sii9234 Y
Sensors
- gyroscope mpu3050 N
- accelerometer kxtf9 N
- compass ak8975 N
- light sensor bh1721fvc Y
Touch Digitizer mxt1386 Y
Vibration Motor isa1200 N
Voltage Regulators tps6586x Y
Wifi / Bluetooth bcm4330 Y
3G Modem xmm6260 N
3.5mm Jack sec_jack N
30-pin accessory port unknown N

Analog Digital Converter (stmpe811)

  • STMPE811 is a multi function GPIO Expander / ADC / Touchscreen controller
  • p4wifi uses only the ADC functionality
  • Mainline has an mfd driver for STMPE. ADC functionality is implemented out of tree.

Audio (wm8994)

  • Audio output works with mainline driver.
  • Audio microphone input does not work.
    • It relies on board specific details which have yet to be deconstructed.

Battery & Charger

  • The battery is MAX17042
  • The charger is possibly the MAX8903
    • A teardown of the Galaxy Tab 8.9 shows a MAX8903 chip. The Galaxy Tab 8.9 uses the same downstream battery and charger driver as Galaxy Tab 10.1. Therefore it may be reasonable to assume the Galaxy Tab 10.1 also has a MAX8903
    • There is a mainline driver for MAX8903.
    • The mainline MAX8903 driver is designed for separate USB and DC cables. The Galaxy Tab 10.1 uses one cable for USB and DC.

Quirks:

  • The downstream charger driver doesn't use full charge GPIO as an interrupt. It set a periodic timer which checks the battery level.
  • The full charge GPIO may be bugged as it's been observed to trigger at ~90% charge. (Maybe this is intended in order to slow charge when the battery is near full ???)

USB Connector

  • The USB connector mode is set through two GPIOs: usb_sel1 and usb_sel2
  • The downstream kernel defines three USB paths.
typedef enum
{
	USB_SEL_AP_USB = 0,
	USB_SEL_CP_USB,
	USB_SEL_ADC
}

Display Panel

  • The display panel itself is LTN101AL03-801.
  • The display panel is driven by a CMC623 chip.
  • There are two variants of display.
    • CMC623 (LSI). Display clock: 68.9 Mhz.
    • CMC623F (Fujitsu). Display clock: 76 Mhz.

Quirks:

  • Changing the pll driving the display will result in display glitch (a.k.a. Rolling Screen).
    • To avoid this, must not change pll clock or assert resets.
  • Non-standard Tegra DC pin output polarity.

eMMC

  • Known eMMC chips MAG4FA and SEM16G.
  • Vulnerable to eMMC brick bug. (MMC_QUIRK_SEC_ERASE_TRIM_BROKEN)

Quirks:

I'm not convinced that any eMMC chip has this problem, it may have just been confusion on the part of nVidia caused by their bootloader's "logical block" addressing system, where the boot sectors are addressed as 0, and the regular area starts at sizeof(boot sector). The off-by-two error may have been caused by the affected eMMC having two boot sectors.

Wifi

Quirks:

  • OOB (Out of Band) interrupt does not work
  • Must use sdio_reset_comm() to power on the wifi chip.
  • See commits:
    • mmc: Add new API call 'sdio_reset_comm' for resetting communication with an SDIO device
    • mmc: sdio: fix sdio_reset_comm() to take care of UHS card reset