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i#5036 AArch64: Remove Z register checks in tracer and sample clients (…
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…#6431)

drcachesim's tracer.cpp, sample clients memtrace_simple.c and
memval_simple.c have checks to avoid handling SVE scatter/gather memory
instructions, i.e. use of Z registers in memory address operands. Now
that a significant number of scatter/gather instructions have been
implemented, these checks can be removed.

Issues: #5036, #5365, #3044
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@AssadHashmi
AssadHashmi committed Nov 15, 2023
1 parent 77f62ea commit 56c6b0f
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Showing 3 changed files with 0 additions and 106 deletions.
34 changes: 0 additions & 34 deletions api/samples/memtrace_simple.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -121,10 +121,6 @@ static int tls_idx;

#define MINSERT instrlist_meta_preinsert

#ifdef AARCH64
static bool reported_sg_warning = false;
#endif

static void
memtrace(void *drcontext)
{
Expand Down Expand Up @@ -320,43 +316,13 @@ event_app_instruction(void *drcontext, void *tag, instrlist_t *bb, instr_t *wher
for (i = 0; i < instr_num_srcs(instr_operands); i++) {
const opnd_t src = instr_get_src(instr_operands, i);
if (opnd_is_memory_reference(src)) {
#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(src) &&
(reg_is_z(opnd_get_base(src)) || reg_is_z(opnd_get_index(src)))) {
if (!reported_sg_warning) {
dr_fprintf(STDERR,
"WARNING: Scatter/gather is not supported, results will "
"be inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif
instrument_mem(drcontext, bb, where, src, false);
}
}

for (i = 0; i < instr_num_dsts(instr_operands); i++) {
const opnd_t dst = instr_get_dst(instr_operands, i);
if (opnd_is_memory_reference(dst)) {
#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(dst) &&
(reg_is_z(opnd_get_base(dst)) || reg_is_z(opnd_get_index(dst)))) {
if (!reported_sg_warning) {
dr_fprintf(STDERR,
"WARNING: Scatter/gather is not supported, results will "
"be inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif
instrument_mem(drcontext, bb, where, dst, true);
}
}
Expand Down
36 changes: 0 additions & 36 deletions api/samples/memval_simple.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -104,10 +104,6 @@ static int tls_idx;
static drx_buf_t *write_buffer;
static drx_buf_t *trace_buffer;

#ifdef AARCH64
static bool reported_sg_warning = false;
#endif

/* Requires that hex_buf be at least as long as 2*memref->size + 1. */
static char *
write_hexdump(char *hex_buf, byte *write_base, mem_ref_t *mem_ref)
Expand Down Expand Up @@ -332,23 +328,6 @@ handle_post_write(void *drcontext, instrlist_t *ilist, instr_t *where, reg_id_t
DR_ASSERT_MSG(false, "Found inst with multiple memory destinations");
break;
}

#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(dst) &&
(reg_is_z(opnd_get_base(dst)) || reg_is_z(opnd_get_index(dst)))) {
if (!reported_sg_warning) {
dr_fprintf(STDERR,
"WARNING: Scatter/gather is not supported, results "
"will be inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif

seen_memref = true;
instrument_post_write(drcontext, ilist, where, dst, prev_instr, reg_addr);
}
Expand Down Expand Up @@ -404,21 +383,6 @@ event_app_instruction(void *drcontext, void *tag, instrlist_t *bb, instr_t *wher
DR_ASSERT_MSG(false, "Found inst with multiple memory destinations");
break;
}
#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(dst) &&
(reg_is_z(opnd_get_base(dst)) || reg_is_z(opnd_get_index(dst)))) {
if (!reported_sg_warning) {
dr_fprintf(STDERR,
"WARNING: Scatter/gather is not supported, results "
"will be inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif
data->reg_addr = instrument_pre_write(
drcontext, bb, where, data->last_opcode, instr_operands, dst);
seen_memref = true;
Expand Down
36 changes: 0 additions & 36 deletions clients/drcachesim/tracer/tracer.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -176,10 +176,6 @@ static void *trace_thread_cb_user_data;
static bool thread_filtering_enabled;
bool attached_midway;

#ifdef AARCH64
static bool reported_sg_warning = false;
#endif

// We may be able to safely use std::unordered_map as at runtime we only need
// to do lookups which shouldn't need heap or locks, but to be safe we use
// the DR hashtable.
Expand Down Expand Up @@ -1353,22 +1349,6 @@ event_app_instruction(void *drcontext, void *tag, instrlist_t *bb, instr_t *inst
for (i = 0; i < instr_num_srcs(instr_operands); i++) {
const opnd_t src = instr_get_src(instr_operands, i);
if (opnd_is_memory_reference(src)) {
#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(src) &&
(reg_is_z(opnd_get_base(src)) || reg_is_z(opnd_get_index(src)))) {
if (!reported_sg_warning) {
NOTIFY(
0,
"WARNING: Scatter/gather is not supported, results will be "
"inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif
adjust = instrument_memref(drcontext, ud, bb, where, reg_ptr, adjust,
instr_operands, src, i, false, pred, mode);
}
Expand All @@ -1377,22 +1357,6 @@ event_app_instruction(void *drcontext, void *tag, instrlist_t *bb, instr_t *inst
for (i = 0; i < instr_num_dsts(instr_operands); i++) {
const opnd_t dst = instr_get_dst(instr_operands, i);
if (opnd_is_memory_reference(dst)) {
#ifdef AARCH64
/* TODO i#5036: Memory references involving SVE registers are not
* supported yet. To be implemented as part of scatter/gather work.
*/
if (opnd_is_base_disp(dst) &&
(reg_is_z(opnd_get_base(dst)) || reg_is_z(opnd_get_index(dst)))) {
if (!reported_sg_warning) {
NOTIFY(
0,
"WARNING: Scatter/gather is not supported, results will be "
"inaccurate\n");
reported_sg_warning = true;
}
continue;
}
#endif
adjust = instrument_memref(drcontext, ud, bb, where, reg_ptr, adjust,
instr_operands, dst, i, true, pred, mode);
}
Expand Down

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