i#1569 AArch64: Implement AArch64 parts of merged mangle.c.

{aarch64,arm}/mangle.c are merged into aarchxx/mangle.c.

Implement AArch64 functions that are called during execution of a
simple program.

Review-URL: https://codereview.appspot.com/296950043

CMakeLists.txt

@@ -244,6 +244,12 @@ else ()
   message(FATAL_ERROR "Unknown architecture target")
 endif ()
 
+if (ARM OR AARCH64)
+  set(ARCH_NAME_SHARED aarchxx)
+else ()
+  set(ARCH_NAME_SHARED ${ARCH_NAME})
+endif ()
+
 # The plan is to use X64 to mean 64-bit generically, whether AMD64 or AARCH64.
 # Whether 64-bit is expected to be selected by user setting up compiler
 # prior to invoking CMake: it has to be that way for Windows, and for

core/CMakeLists.txt

@@ -203,7 +203,7 @@ set(ARCH_SRCS
   arch/proc_shared.c
   arch/${ARCH_NAME}/proc.c
   arch/mangle_shared.c
-  arch/${ARCH_NAME}/mangle.c
+  arch/${ARCH_NAME_SHARED}/mangle.c
   arch/${ARCH_NAME}/clean_call_opt.c
   arch/steal_reg.c
   arch/x86_code.c
@@ -267,11 +267,7 @@ if (UNIX)
     set(OS_SRCS ${OS_SRCS} unix/memcache.c)
     set(OS_SRCS ${OS_SRCS} unix/module_elf.c)
     set(OS_SRCS ${OS_SRCS} unix/ksynch_linux.c)
-    if (ARM OR AARCH64)
-      set(OS_SRCS ${OS_SRCS} unix/tls_linux_aarchxx.c)
-    else ()
-      set(OS_SRCS ${OS_SRCS} unix/tls_linux_${ARCH_NAME}.c)
-    endif ()
+    set(OS_SRCS ${OS_SRCS} unix/tls_linux_${ARCH_NAME_SHARED}.c)
     set(OS_SRCS ${OS_SRCS} unix/signal_linux.c)
     set(OS_SRCS ${OS_SRCS} unix/signal_linux_${ARCH_NAME}.c)
     set(OS_SRCS ${OS_SRCS} unix/native_elf.c)
@@ -449,7 +445,7 @@ copy_target_to_device(${PRELOAD_NAME})
 # static decoding library
 add_library(drdecode
   ${DECODER_SRCS}
-  arch/${ARCH_NAME}/mangle.c
+  arch/${ARCH_NAME_SHARED}/mangle.c
   arch/decodelib.c
   )
 set_target_properties(drdecode PROPERTIES

core/arch/aarch64/encode.c

@@ -51,6 +51,38 @@ const char * const reg_names[] = {
 const reg_id_t dr_reg_fixer[] = {
     REG_NULL,
     REG_NULL,
+
+#define XREGS \
+    DR_REG_X0,  DR_REG_X1,   DR_REG_X2,   DR_REG_X3,  \
+    DR_REG_X4,  DR_REG_X5,   DR_REG_X6,   DR_REG_X7,  \
+    DR_REG_X8,  DR_REG_X9,   DR_REG_X10,  DR_REG_X11, \
+    DR_REG_X12, DR_REG_X13,  DR_REG_X14,  DR_REG_X15, \
+    DR_REG_X16, DR_REG_X17,  DR_REG_X18,  DR_REG_X19, \
+    DR_REG_X20, DR_REG_X21,  DR_REG_X22,  DR_REG_X23, \
+    DR_REG_X24, DR_REG_X25,  DR_REG_X26,  DR_REG_X27, \
+    DR_REG_X28, DR_REG_X29,  DR_REG_X30,  DR_REG_X31,
+XREGS /* X0-X31 */
+XREGS /* W0-W31 */
+#undef XREGS
+
+#define QREGS \
+    DR_REG_Q0,  DR_REG_Q1,   DR_REG_Q2,   DR_REG_Q3,  \
+    DR_REG_Q4,  DR_REG_Q5,   DR_REG_Q6,   DR_REG_Q7,  \
+    DR_REG_Q8,  DR_REG_Q9,   DR_REG_Q10,  DR_REG_Q11, \
+    DR_REG_Q12, DR_REG_Q13,  DR_REG_Q14,  DR_REG_Q15, \
+    DR_REG_Q16, DR_REG_Q17,  DR_REG_Q18,  DR_REG_Q19, \
+    DR_REG_Q20, DR_REG_Q21,  DR_REG_Q22,  DR_REG_Q23, \
+    DR_REG_Q24, DR_REG_Q25,  DR_REG_Q26,  DR_REG_Q27, \
+    DR_REG_Q28, DR_REG_Q29,  DR_REG_Q30,  DR_REG_Q31,
+QREGS /* Q0-Q31*/
+QREGS /* D0-D31 */
+QREGS /* S0-S31 */
+QREGS /* H0-H31 */
+QREGS /* B0-B31 */
+#undef QREGS
+
+    DR_REG_NZCV, DR_REG_FPCR, DR_REG_FPSR,
+    DR_REG_TPIDR_EL0, DR_REG_TPIDRRO_EL0
 };
 
 #ifdef DEBUG

core/arch/aarch64/instr_create.h

@@ -255,7 +255,7 @@
   opnd_create_reg_ex(opnd_get_reg(Rm), 0, DR_OPND_SHIFTED), \
   opnd_add_flags((shift), DR_OPND_IS_SHIFT), (imm))
 
-/* FIXME i#1569: placeholder for undecoded instructions */
+/* FIXME i#1569: replace all uses of this when there is a proper encoder */
 #define INSTR_CREATE_xx(dc, enc) \
   instr_create_0dst_1src((dc), OP_xx, OPND_CREATE_INT32(enc))