IR: Optimize runtime of optimization passes

External/FEXCore/Source/CMakeLists.txt

@@ -155,10 +155,8 @@ set (SRCS
   Interface/IR/Passes/ValueDominanceValidation.cpp
   Interface/IR/Passes/PhiValidation.cpp
   Interface/IR/Passes/RedundantFlagCalculationElimination.cpp
-  Interface/IR/Passes/DeadFlagStoreElimination.cpp
+  Interface/IR/Passes/DeadStoreElimination.cpp
   Interface/IR/Passes/StaticRegisterAllocationPass.cpp
-  Interface/IR/Passes/DeadGPRStoreElimination.cpp
-  Interface/IR/Passes/DeadFPRStoreElimination.cpp
   Interface/IR/Passes/RegisterAllocationPass.cpp
   Interface/IR/Passes/SyscallOptimization.cpp
   Utils/ELFLoader.cpp

External/FEXCore/Source/Interface/Core/JIT/x86_64/VectorOps.cpp

@@ -327,7 +327,7 @@ DEF_OP(VAddV) {
   switch (Op->Header.ElementSize) {
     case 2: {
       for (int i = Elements; i > 1; i >>= 1) {
-        phaddw(Dest, Src);
+        vphaddw(Dest, Src, Dest);
         Src = Dest;
       }
       pextrw(eax, Dest, 0);
@@ -336,7 +336,7 @@ DEF_OP(VAddV) {
     }
     case 4: {
       for (int i = Elements; i > 1; i >>= 1) {
-        phaddd(Dest, Src);
+        vphaddd(Dest, Src, Dest);
         Src = Dest;
       }
       pextrd(eax, Dest, 0);

External/FEXCore/Source/Interface/IR/IR.json

@@ -28,7 +28,7 @@
     "static constexpr FEXCore::IR::RegisterClassType FPRFixedClass {3}",
     "static constexpr FEXCore::IR::RegisterClassType GPRPairClass {4}",
     "static constexpr FEXCore::IR::RegisterClassType ComplexClass {5}",
-    "static constexpr FEXCore::IR::RegisterClassType InvalidClass {~0U}",
+    "static constexpr FEXCore::IR::RegisterClassType InvalidClass {7}",
     "",
     "static const FEXCore::IR::TypeDefinition i8    {TypeDefinition::Create(1, 0)}",
     "static const FEXCore::IR::TypeDefinition i16   {TypeDefinition::Create(2, 0)}",

External/FEXCore/Source/Interface/IR/PassManager.cpp

@@ -11,9 +11,7 @@ void PassManager::AddDefaultPasses(bool InlineConstants, bool StaticRegisterAllo
 
   if (!DisablePasses()) {
     InsertPass(CreateContextLoadStoreElimination());
-    InsertPass(CreateDeadFlagStoreElimination());
-    InsertPass(CreateDeadGPRStoreElimination());
-    InsertPass(CreateDeadFPRStoreElimination());
+    InsertPass(CreateDeadStoreElimination());
     InsertPass(CreatePassDeadCodeElimination());
     InsertPass(CreateConstProp(InlineConstants));
 

External/FEXCore/Source/Interface/IR/Passes.h

@@ -8,9 +8,7 @@ FEXCore::IR::Pass* CreateConstProp(bool InlineConstants);
 FEXCore::IR::Pass* CreateContextLoadStoreElimination();
 FEXCore::IR::Pass* CreateSyscallOptimization();
 FEXCore::IR::Pass* CreateDeadFlagCalculationEliminination();
-FEXCore::IR::Pass* CreateDeadFlagStoreElimination();
-FEXCore::IR::Pass* CreateDeadGPRStoreElimination();
-FEXCore::IR::Pass* CreateDeadFPRStoreElimination();
+FEXCore::IR::Pass* CreateDeadStoreElimination();
 FEXCore::IR::Pass* CreatePassDeadCodeElimination();
 FEXCore::IR::Pass* CreateIRCompaction();
 FEXCore::IR::RegisterAllocationPass* CreateRegisterAllocationPass(FEXCore::IR::Pass* CompactionPass, bool OptimizeSRA);

External/FEXCore/Source/Interface/IR/Passes/ConstProp.cpp

@@ -12,6 +12,8 @@
 namespace FEXCore::IR {
 
 class ConstProp final : public FEXCore::IR::Pass {
+  std::unordered_map<uint64_t, OrderedNode*> ConstPool;
+  std::map<OrderedNode*, uint64_t> AddressgenConsts;
 public:
   bool Run(IREmitter *IREmit) override;
   bool InlineConstants;
@@ -164,22 +166,21 @@ bool ConstProp::Run(IREmitter *IREmit) {
   auto HeaderOp = CurrentIR.GetHeader();
 
   {
-    std::map<uint64_t, OrderedNode*> Consts;
 
     // constants are pooled per block
     for (auto [BlockNode, BlockHeader] : CurrentIR.GetBlocks()) {
       for (auto [CodeNode, IROp] : CurrentIR.GetCode(BlockNode)) {
         if (IROp->Op == OP_CONSTANT) {
           auto Op = IROp->C<IR::IROp_Constant>();
-          if (Consts.count(Op->Constant)) {
-            IREmit->ReplaceAllUsesWith(CodeNode, Consts[Op->Constant]);
+          if (ConstPool.count(Op->Constant)) {
+            IREmit->ReplaceAllUsesWith(CodeNode, ConstPool[Op->Constant]);
             Changed = true;
           } else {
-            Consts[Op->Constant] = CodeNode;
+            ConstPool[Op->Constant] = CodeNode;
           }
         }
       }
-      Consts.clear();
+      ConstPool.clear();
     }
   }
 
@@ -265,29 +266,28 @@ bool ConstProp::Run(IREmitter *IREmit) {
 
   // LoadMem / StoreMem imm pooling
   // If imms are close by, use address gen to generate the values instead of using a new imm
-  std::map<OrderedNode*, uint64_t> Consts;
   for (auto [BlockNode, BlockIROp] : CurrentIR.GetBlocks()) {
     for (auto [CodeNode, IROp] : CurrentIR.GetCode(BlockNode)) {
       if (IROp->Op == OP_LOADMEM || IROp->Op == OP_STOREMEM) {
         uint64_t Addr;
 
         if (IREmit->IsValueConstant(IROp->Args[0], &Addr) && IROp->Args[1].IsInvalid()) {
-          for (auto& Const: Consts) {
+          for (auto& Const: AddressgenConsts) {
             if ((Addr - Const.second) < 65536) {
               IREmit->ReplaceNodeArgument(CodeNode, 0, Const.first);
               IREmit->ReplaceNodeArgument(CodeNode, 1, IREmit->_Constant(Addr - Const.second));
               goto doneOp;
             }
           }
 
-          Consts[IREmit->UnwrapNode(IROp->Args[0])] = Addr;
+          AddressgenConsts[IREmit->UnwrapNode(IROp->Args[0])] = Addr;
         }
         doneOp:
         ;
       }
       IREmit->SetWriteCursor(CodeNode);
     }
-    Consts.clear();
+    AddressgenConsts.clear();
   }
 
   for (auto [CodeNode, IROp] : CurrentIR.GetAllCode()) {

External/FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp

@@ -28,7 +28,10 @@ namespace {
     FEXCore::IR::OrderedNode *StoreNode;
   };
 
-  using ContextInfo = std::vector<ContextMemberInfo>;
+  struct ContextInfo {
+    std::vector<ContextMemberInfo*> Lookup;
+    std::vector<ContextMemberInfo> ClassificationInfo;
+  };
 
   constexpr static std::array<LastAccessType, 14> DefaultAccess = {
     ACCESS_NONE,
@@ -47,7 +50,9 @@ namespace {
     ACCESS_NONE,
   };
 
-  static void ClassifyContextStruct(ContextInfo *ContextClassification) {
+  static void ClassifyContextStruct(ContextInfo *ContextClassificationInfo) {
+    auto ContextClassification = &ContextClassificationInfo->ClassificationInfo;
+
     ContextClassification->emplace_back(ContextMemberInfo{
       ContextMemberClassification {
         offsetof(FEXCore::Core::CPUState, rip),
@@ -88,15 +93,6 @@ namespace {
       });
     }
 
-    ContextClassification->emplace_back(ContextMemberInfo{
-      ContextMemberClassification {
-        offsetof(FEXCore::Core::CPUState, gs),
-        sizeof(FEXCore::Core::CPUState::gs),
-      },
-      DefaultAccess[4],
-      FEXCore::IR::InvalidClass,
-    });
-
     ContextClassification->emplace_back(ContextMemberInfo{
       ContextMemberClassification {
         offsetof(FEXCore::Core::CPUState, es),
@@ -133,6 +129,15 @@ namespace {
       FEXCore::IR::InvalidClass,
     });
 
+    ContextClassification->emplace_back(ContextMemberInfo{
+      ContextMemberClassification {
+        offsetof(FEXCore::Core::CPUState, gs),
+        sizeof(FEXCore::Core::CPUState::gs),
+      },
+      DefaultAccess[4],
+      FEXCore::IR::InvalidClass,
+    });
+
     ContextClassification->emplace_back(ContextMemberInfo{
       ContextMemberClassification {
         offsetof(FEXCore::Core::CPUState, fs),
@@ -186,16 +191,27 @@ namespace {
     }
 
     size_t ClassifiedStructSize{};
+    ContextClassificationInfo->Lookup.reserve(sizeof(FEXCore::Core::CPUState));
     for (auto &it : *ContextClassification) {
+      LogMan::Throw::A(it.Class.Offset == ContextClassificationInfo->Lookup.size(), "Offset missmatch %d %d", it.Class.Offset == ContextClassificationInfo->Lookup.size());
+      for (int i = 0; i < it.Class.Size; i++) {
+        ContextClassificationInfo->Lookup.push_back(&it);
+      }
       ClassifiedStructSize += it.Class.Size;
     }
 
     LogMan::Throw::A(ClassifiedStructSize == sizeof(FEXCore::Core::CPUState),
       "Classified CPUStruct size doesn't match real CPUState struct size! %ld != %ld",
       ClassifiedStructSize, sizeof(FEXCore::Core::CPUState));
+
+    LogMan::Throw::A(ContextClassificationInfo->Lookup.size() == sizeof(FEXCore::Core::CPUState),
+      "Classified CPUStruct size doesn't match real CPUState struct size! %ld != %ld",
+      ContextClassificationInfo->Lookup.size(), sizeof(FEXCore::Core::CPUState));
   }
 
-  static void ResetClassificationAccesses(ContextInfo *ContextClassification) {
+  static void ResetClassificationAccesses(ContextInfo *ContextClassificationInfo) {
+    auto ContextClassification = &ContextClassificationInfo->ClassificationInfo;
+
     auto SetAccess = [&](size_t Offset, auto Access) {
       ContextClassification->at(Offset).Accessed = Access;
       ContextClassification->at(Offset).AccessRegClass = FEXCore::IR::InvalidClass;
@@ -265,20 +281,8 @@ class RCLSE final : public FEXCore::IR::Pass {
   bool RedundantStoreLoadElimination(FEXCore::IR::IREmitter *IREmit);
 };
 
-ContextMemberInfo *RCLSE::FindMemberInfo(ContextInfo *ClassifiedInfo, uint32_t Offset, uint8_t Size) {
-  ContextMemberInfo *Info{};
-  // Just linearly scan to find the info
-  for (size_t i = 0; i < ClassifiedInfo->size(); ++i) {
-    ContextMemberInfo *LocalInfo = &ClassifiedInfo->at(i);
-    if (LocalInfo->Class.Offset <= Offset &&
-        (LocalInfo->Class.Offset + LocalInfo->Class.Size) > Offset) {
-      Info = LocalInfo;
-      break;
-    }
-  }
-  LogMan::Throw::A(Info != nullptr, "Couldn't find Context Member to record to");
-
-  return Info;
+ContextMemberInfo *RCLSE::FindMemberInfo(ContextInfo *ContextClassificationInfo, uint32_t Offset, uint8_t Size) {
+  return ContextClassificationInfo->Lookup.at(Offset);
 }
 
 ContextMemberInfo *RCLSE::RecordAccess(ContextMemberInfo *Info, FEXCore::IR::RegisterClassType RegClass, uint32_t Offset, uint8_t Size, LastAccessType AccessType, FEXCore::IR::OrderedNode *Node, FEXCore::IR::OrderedNode *StoreNode) {
@@ -404,7 +408,7 @@ bool RCLSE::RedundantStoreLoadElimination(FEXCore::IR::IREmitter *IREmit) {
 
   // XXX: Walk the list and calculate the control flow
 
-  ContextInfo LocalInfo = ClassifiedStruct;
+  ContextInfo &LocalInfo = ClassifiedStruct;
 
   for (auto [BlockNode, BlockHeader] : CurrentIR.GetBlocks()) {